k4t56043qf Samsung Semiconductor, Inc., k4t56043qf Datasheet - Page 31
![no-image](/images/no-image-200.jpg)
k4t56043qf
Manufacturer Part Number
k4t56043qf
Description
256mb F-die Ddr2 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4T56043QF.pdf
(36 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
k4t56043qf-GCCC
Manufacturer:
SAMSUNG
Quantity:
4 000
256Mb F-die DDR2 SDRAM
General notes, which may apply for all AC parameters
1. Slew Rate Measurement Levels
Read postamble
Active to active command
period for 1KB page size
products
Active to active command
period for 2KB page size
products
CAS to CAS command delay
Write recovery time
Auto precharge write
recovery + precharge time
Internal write to read
command delay
Internal read to precharge
command delay
Exit self refresh to a non-
read command
Exit self refresh to a read
command
Exit precharge power down
to any non-read command
Exit active power down to
read command
Exit active power down to read
command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down
mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down
mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output
delay
Minimum time clocks
remains ON after CKE
asynchronously drops LOW
tRPST
tRRD
tRRD
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
t
t
AONPD
t
AOFPD
t
tANPD
tAXPD
tDelay
AOND
AOFD
t
t
t
AON
tOIT
CKE
AOF
tWR+tRP*
tRFC + 10
tIS+tCK+tI
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
6 - AL
200
0.4
7.5
7.5
2.5
10
7.5
15
H
2
3
2
2
2
3
8
0
2
2
2.5tCK+tA
2tCK+tAC
C(max)+1
tAC(max)
tAC(max)
(max)+1
+ 0.6
+0.7
0.6
2.5
Page 31 of 36
12
x
x
2
x
x
x
x
x
tWR+tRP*
tRFC + 10
tAC(min)+
tAC(min)+
tIS+tCK+tI
tAC(min)
tAC(min)
6 - AL
200
0.4
7.5
7.5
7.5
2.5
10
15
3
H
2
2
2
2
2
3
8
0
2
2tCK+tAC
tAC(max)
tAC(max)
tAC(max)+
(max)+1
2.5tCK+
0.6
2.5
+1
0.6
+1
12
2
x
x
x
x
x
x
x
tIS+tCK+t
tWR+tRP
tAC(min)
tAC(min)
tAC(min)
tAC(min)
tRFC +
6 - AL
200
0.4
7.5
7.5
2.5
10
15
10
+2
+2
IH
10
2
2
3
2
3
8
0
*
2
C(max)+1
tAC(max)
tAC(max)+
tAC(max)
2tCK+tA
2.5tCK+
Rev. 0.91 (Sep. 2003)
DDR2 SDRAM
0.6
2.5
+1
0.6
+1
12
2
x
x
x
x
x
x
x
Preliminary
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13, 24
9, 10
25
12
12
22
23
11
9