am49pdl127ah Meet Spansion Inc., am49pdl127ah Datasheet - Page 13

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am49pdl127ah

Manufacturer Part Number
am49pdl127ah
Description
Stacked Multi-chip Package Mcp Flash Memory And Psram, 128 Megabit 8m ? 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 16 Mbit 1m ? 16-bit Cmos Pseudo Static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
PIN DESCRIPTION
A19–A0
A21-A20
A22
DQ15–DQ0
CE#f1
CE#f1, CE#f2 = Chip Enable Inputs. CE#f1 controls
CE#1ps
CE2ps
OE#
WE#
RY/BY#
UB#s
LB#s
RESET#
WP#/ACC
December 18, 2003
= Output Enable (Common)
= Ready/Busy Output and open drain.
= 20 Address Inputs (Common)
= 2 Address Inputs (Flash)
= Address Input (PDL127 only)
= 16 Data Inputs/Outputs (Common)
= Chip Enable 1 (Flash) (PDL 127
= Chip Enable 1 (pSRAM) (PDL129
= Chip Enable 2 (pSRAM)
= Write Enable (Common)
= Upper Byte Control (pSRAM)
= Lower Byte Control (pSRAM)
= Hardware Reset Pin, Active Low
= Write Protect/Acceleration Input.
(Flash)
only)
the 64 Mb in Banks 1A and 1B.
CE#f2 controls the 64 Mb in Banks
2A and 2B.
only)
When RY/BY# = V
ready to accept read operations and
commands. When RY/BY# = V
the device is either executing an em-
bedded algorithm or the device is
executing a hardware reset opera-
tion.
When WP/ACC#= V
and lowest two 4K-word sectors are
write protected regardless of other
sector protection configurations.
When WP/ACC#= V
are unprotected unless the DYB or
A D V A N C E
IH
IH
IL
, the device is
Am49PDL127AH/Am49PDL129AH
, the highest
, these sector
OL
,
I N F O R M A T I O N
V
V
V
NC
LOGIC SYMBOL
CC
CC
SS
20
f
s
CE#f2 (PDL129 Only)
A22 (PDL127 Only)
CE2ps
CE#f1
CE#1ps
OE#
WE#
WP#/ACC
RESET#
UB#s
LB#s
A21-A20
A19–A0
= Flash 3.0 volt-only single power sup-
= pSRAM Power Supply
= Device Ground (Common)
= Pin Not Connected Internally
PPB is programmed. When WP/
ACC#= 12V, program and erase op-
erations are accelerated.
ply (see Product Selector Guide for
speed options and voltage supply
tolerances)
DQ15–DQ0
RY/BY#
16
11

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