th50vsf2580 TOSHIBA Semiconductor CORPORATION, th50vsf2580 Datasheet - Page 20

• Manufacturer Part Number: th50vsf2580
• Description: Sram And Flash Memory Mixed Multi-chip Package
• Manufacturer: TOSHIBA Semiconductor CORPORATION

ID Read Mode
programmers to automatically identify the device type.
bank to ID Read mode. Banks are specified by inputting the bank address (BK) in the third bus write cycle of
the command cycle. To read an ID code, the bank address as well as the ID read address must be specified.
From address BK + 00 the maker code is output; from address BK + 01 the device code is output. From other
banks, data are output from the memory cells. Inputting a Reset command releases ID Read mode and returns
the device to Read mode.
Standby Mode
(1) Control using CEF and RESET
(2) Control using RESET only
Auto-Sleep Mode
the device will automatically enter Sleep Mode and the current will be reduced to the standby current (I
However, if the device is in the process of performing simultaneous operation, the device will not enter Standby
Mode but will instead cause the operating current to flow. Because the output data is latched, data is output in
Sleep Mode. When the address is changed, Sleep Mode is automatically released, and data from the new
address is output.
Output Disable Mode
ID Read mode is used to read the device maker code and device code. The mode is useful for EPROM
In this method, simultaneous operation can be performed. Inputting an ID Read command sets the specified
Access time in ID Read mode is the same as that in Read mode. For the codes, see the ID Code Table.
There are two ways to put the device into Standby Mode.
This function suppresses power dissipation during reading. If the address input does not change for 150 ns,
Inputting V
Mode and the current will be reduced to the standby current (I
of performing simultaneous operation, the device will not enter Standby Mode but will instead cause the
operating current to flow.
current will be reduced to the standby current (I
simultaneous operation, this method will terminate the current operation and set the device to Standby
Mode. This is a hardware reset and is described later.
With the device in Read Mode, input V
With the device in Read Mode, input V
In Standby Mode DQ is put in High-Impedance state.
IH
to OE disables output from the device and sets DQ to High-Impedance.
SS
DD
± 0.3 V to RESET . The device will enter Standby Mode and the
± 0.3 V to CEF and RESET . The device will enter Standby
CCS1
). Even if the device is in the process of performing
CCS1
). However, if the device is in the process
TH50VSF2580/2581AASB
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CCS2
).