hi-3111pstf Holt Integrated Circuits, Inc., hi-3111pstf Datasheet - Page 35

• Manufacturer Part Number: hi-3111pstf
• Description: Avionics Can Controller With Integrated Transceiver
• Manufacturer: Holt Integrated Circuits, Inc.

HI-3110 Transmit Buffer
The HI-3110 transmit buffer consists of an eight message
FIFO which allows transmission of up to eight messages.
Messages are loaded to the transmit FIFO via SPI
instruction. Similarly, an SPI instruction resets (clears) the
transmit FIFO.
Transmission from the FIFO is enabled by asserting the
TXEN pin or setting the TXEN bit in CTRL1. If transmission
is enabled, all loaded messages are automatically sent if the
bus is available. If TXEN is not enabled, messages will not
be sent until TXEN is set. If TXEN is reset, a single message
may also be sent by setting the TX1M bit in CTRL1.
MESSAGE TRANSMISSION SEQUENCE
A simplified transmission flow is illustrated in Figure 9. The
next message to be transmitted (or current message trying
to gain access to the bus) is loaded from the FIFO to the
Transmit Buffer. This will happen automatically if TXEN or
TX1M are set in CTRL1.
If the bus is available, the message is sent.
transmission can be aborted at any time using the Abort
Transmission SPI command (see Table 1). Care should be
exercised when using the command as it may cause other
nodes on the bus to generate error frames if the message is
aborted prior to completing transmission.
transmission sequence can also be paused by resetting the
TXEN bit in CTRL1 (or pulling TXEN pin low). In this case,
the current message will be completed and any remaining
messages in the transmit FIFO will not be transmitted.
If the current message transmission goes ahead, two things
can happen:
a) The message is successful, and the transmit buffer is now
ready to receive the next message from the transmit FIFO.
The transmit history FIFO is updated (see below).
b) The message is not successful due to lost arbitration or
message error.
i. Lost Arbitration:
message stays in the Transmit Buffer for
re-transmission provided OSM is not set. If OSM is
set, the next message is loaded to the transmit
buffer for transmission, provided TXEN or TX1M is
set. In this case, the current message is lost and it is
up to the user to re-load and initiate a
re-transmission.
ii. Message error:
Interrupt Flag Register. An error frame is sent and
an optional hardware interrupt may also be
generated at the INT pin if enabled in the Interrupt
Enable Register (bit BUSERRIE = 1). If there is an
error, the current message stays in the Transmit
Buffer for automatic re-transmission in accordance
with the CAN protocol, provided OSM is not set.
If OSM is set, the next message is loaded to the
transmit buffer for transmission, provided TXEN or
TX1M is set. In this case, the current message is
lost and it is up to the user to re-load and initiate a
re-transmission.
Flag BUSERR is set in the
If arbitration is lost, the current
HOLT INTEGRATED CIRCUITS
The current
The
HI-3110
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LOADING THE TRANSMIT FIFO VIA SPI
The transmit FIFO is loaded via SPI instruction (see Table 1).
The data format for the SPI instruction is illustrated in Table
2. The host simply needs to issue the SPI write command
0x12 followed by the SPI data field as described in Table 2.
For standard frames, the SPI data field has the format shown
in Table 2(a). For extended frames, the SPI data field has
the format shown in Table 2(b).
automatically interpret Standard or Extended frames by
decoding the IDE bit. The HI-3110 also decodes the data
length code (DLC) and ignores data bytes greater than the
DLC value (
assumed to be equal to 8). The user has the option of
assigning a unique message tag to each message which
can be used later to identify successfully transmitted
messages from the transmit history FIFO. Up to 8 frames
can be loaded to the transmit FIFO for transmission. The
byte format should be as shown in Table 2 and the
should remain low during the entire SPI sequence.
TRANSMIT HISTORY FIFO
The Transmit History FIFO can optionally be used by the
host to keep a record of up to eight successfully transmitted
messages. A user-assigned message tag and a time tag are
stored for each message. The data format is shown in Table
3. The time tag is assigned from the value of the free running
counter upon receipt of an ACK bit. The transmit history
FIFO is cleared when read by SPI command 0xEE (see
Table 3).
Note:
a DLC of greater than 8 is automatically
The HI-3110 will
CS
pin