hi-3593 Holt Integrated Circuits, Inc., hi-3593 Datasheet - Page 8

• Manufacturer Part Number: hi-3593
• Description: 3.3v Arinc 429 Dual Receiver, Single Transmitter With Spi Interface
• Manufacturer: Holt Integrated Circuits, Inc.

ARINC 429 messages consist of a 32-bit sequence as shown
below. The first eight bits that appear on the ARINC 429 bus are
the label byte. The next twenty three bits comprise a data field
which presents data in a variety of formats defined in the ARINC
429 specification. The last bit transmitted is an odd parity bit.
ARINC 429 data is transmitted between the HI-3593 and host
microcontroller using the four-wire Serial Peripheral Interface
(SPI). A read or write operation consists of a single-byte op-code
followed by the data. When writing to the transmit FIFO or reading
from the receive FIFOs, the SPI data field is four bytes. Figure 1
shows how the SPI data bytes are mapped to the ARINC 429
message.
ARINC 429 BIT ORDERING
ARINC 429 Message as received / transmitted on the ARINC 429 serial bus
ARINC 429 Message as transferred on the SPI bus
Example 1. Write Transmit FIFO (Op-Code 0x0C) with TFLIP bit = “0”.
Example 2. Read Receiver 1 FIFO (Op-Code 0xA0) with RFLIP bit = “1”.
Example 3. Read Receiver 2 Priority-Label Register #3 (Op-Code 0xCC).
Example 4. Write Receiver 2 Priority-Label Match Registers (Op-Code 0x2C)with RFLIP bit = “1” or “0”.
0
1
0
1
1
MSB
2
0 0 0 1 1 0 0
0
1
0
SPI Op-Code
SPI Op-Code
SPI Op-Code
SPI Op-Code
3
0
1
1
LABEL
4
0
0
0
5
0 0
1 1
1 1
6
time
7
0 0
0 0
0 0
LSB
8
32
32
32
9
1
MSB
10
31
31
31
2
MSB
MSB
MSB
30
30
30
11
3
LABEL #3
LSB
12 13
29 28
29 28
29 28
4
5
14
27
27
27
6
FIGURE 1.
15
26
26
26
7
LSB
16
25
25
25
8
HOLT INTEGRATED CIRCUITS
17
24
24
24
1
MSB
18 19
23 22
23 22
23 22
2
3
LABEL #2
ARINC 429 & SPI BIT ORDERING
20
21
21
21
4
DATA
DATA
DATA
DATA
20
20
20
21
HI-3593
5
22 23
19 18
19 18
19 18
6
8
7
LSB
ARINC 429 specifies the MSB of the label as ARINC bit 1.
Conversely, the data field MSB is bit 31. So the bit significance of
the label byte and data fields are opposite.
The HI-3593 may be programmed to “flip” the bit ordering of the
label byte as soon as it is received and immediately prior to
transmission. This is accomplished by setting the TFLIP bit to a “1”
in the Transmit Control Register and/or the RFLIP bit in the
Receive Control Registers. The RFLIP bit does not control Priority
Label Match Registers.
Note that when reading ARINC 429 messages from the Priority-
Label Registers the label byte is omitted to permit a faster read
time. The label value will match the value loaded into the Match
Register and therefore does not need to be output each time a
message is read.
24
17
17
17
8
25
16
16
16
1
MSB
26
15
15
15
2
14
14
14
27
3
LABEL #1
28
13
13
13
4
29 30
LSB
12 11
LSB
12 11
LSB
12 11
5
MSB
6
10
10
10
31
7
LSB
32
9
9
9
8
8
1
MSB
LSB
7
2
6
3
LABEL
LABEL
5
4
4 3
5
6
2
7
MSB
LSB
8
1