co661al-l Connect One Ltd., co661al-l Datasheet - Page 23

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co661al-l

Manufacturer Part Number
co661al-l
Description
The Co661al-l Ichip Lan? Internet Controller? Is Part Of A Family Of Intelligent Peripheral Devices That Provides Internet Connectivity Solutions To A Myriad Of Embedded Devices
Manufacturer
Connect One Ltd.
Datasheet
Z2/POBE
PWSG/Z3
Z4
Z5
Z8
Z9
Z10
Z11
Z12
Z13
GND
VCC
iChip LAN CO661AL-L Datasheet
Signal
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
P
P
Pin No.
40
41
61
62
28
29
27
32
66
18
67
1
In Serial mode: Z2 is available as a GPIO for
future use and should be left Not Connected.
In Parallel mode: POBE is used as the Parallel
Output Buffer Empty signal. When HIGH, iChip
LAN may send a parallel data byte to the host.
AT+i Configurable Pin:
PWSG (default): Power Save Gate. This pin is used
to disable the iChip’s oscillator (X1 Pin 42) via an
external gate in order to achieve full Sleep mode
with minimal power consumption (see
Z3: General Purpose I/O.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Reserved as a GPIO for future use. This pin should
be Not Connected.
Ground: iChip LAN Ground signal.
Power Supply: This pin supplies power (+3.3V) to
iChip LAN.
Description
Pin Descriptions
Fig.
7-6).
5-6

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