co661al-l Connect One Ltd., co661al-l Datasheet - Page 15

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co661al-l

Manufacturer Part Number
co661al-l
Description
The Co661al-l Ichip Lan? Internet Controller? Is Part Of A Family Of Intelligent Peripheral Devices That Provides Internet Connectivity Solutions To A Myriad Of Embedded Devices
Manufacturer
Connect One Ltd.
Datasheet
4.2.1 80x86 BUS
This BUS type includes the following signals:
iChip LAN CO661AL-L Datasheet
• -HCS:
• -HRD: Host Read Data. When –HRD is LOW, a data is read from the PAL.
• -HWR: Host Write Data. When –HWR is LOW, a data byte is written to the
• HD0 – HD7:
• -HRES: Parallel reset. A LOW generates a reset signal to the parallel interface.
• -HERR: Parallel error. A LOW indicates a parallel interface error. This pin may
• HOBE
• HIBF
Note 1: HOBE and HIBF complement PIBF and POBE respectively.
1
: Host Input Buffer Full. When HIGH, indicates that the input buffer is
1
: Host Output Buffer Empty. When HIGH, indicates that the output buffer
Host Chip-Select signal. When -HCS is low, PAL is selected.
PAL.
Bi-directional Host data BUS.
This pin may be connected to an 80x86 output port.
be connected to an input port on the 80x86.
is empty and the host may send a data byte to iChip LAN. When the
Host sends a data byte, this signal goes LOW until iChip LAN reads the
data. This signal may be connected to an interrupt or I/O pin on the
80x86.
full and the host may read a data byte from iChip LAN. When the host
reads the data, this signal goes LOW. This pin may be connected to an
interrupt or I/O pin on the 80x86.
80x86
Host
HD0-HD7
-ERROR
-HRES
HOBE
-HWR
-HRD
HIBF
-HCS
Figure 4-1 Interface to an 80x86 Type BUS
EPM7032AEC44
PAL
Hardware Interface
POBE
PIBF
PCS
-RD
-WR
D0-D7
-PRES
-PERR
CO661AL-L
iChip LAN
4-2

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