emc2105 Standard Microsystems Corp., emc2105 Datasheet - Page 62

• Manufacturer Part Number: emc2105
• Description: Emc2105 Rpm-based High Side Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
Revision 1.74 (05-08-08)
46h
6.22
0
0
1
1
R/W
R/W
GAIND OR GAINP OR GAINI [1:0]
1
0
0
1
1
The Fan Spin Up Configuration Register controls the settings of Spin Up Routine. The Fan Spin Up
Configuration Register is software locked.
Bit 7 - 6 - DRIVE_FAIL_CNT[1:0] - Determines how many update cycles are used for the Drive Fail
detection function as shown in
the desired tach target.
Bit 5 - NOKICK - Determines if the Spin Up Routine will drive the fan to 100% duty cycle for 1/4 of the
programmed spin up time before driving it at the programmed level.
Fan Spin Up Configuration Register
1
‘0’ (default) - The Spin Up Routine will drive the fan driver to 100% for 1/4 of the programmed spin
up time before reverting to the programmed spin level.
‘1’ - The Spin Up Routine will not drive the fan driver to 100%. It will set the drive at the
programmed spin level for the entire duration of the programmed spin up time.
DRIVE_FAIL_CNT[1:0]
Configuration
Fan Spin Up
REGISTER
0
1
0
1
Table 6.33 Fan Spin Up Configuration Register
Table 6.34 DRIVE_FAIL_CNT[1:0] Bit Decode
DRIVE_FAIL
B7
_CNT [1:0]
0
0
1
0
1
Table 6.32 Gain Decode
0
Table
B6
DATASHEET
6.34. This circuitry determines whether the fan can be driven to
RPM-Based High Side Fan Controller with Hardware Thermal Shutdown
NOK
ICK
B5
62
Disabled - the Drive Fail detection circuitry is
disabled (default)
16 - the Drive Fail detection circuitry will count for 16
update periods
32 - the Drive Fail detection circuitry will count for 32
update periods
64 - the Drive Fail detection circuitry will count for 64
update periods
B4
SPIN_LVL[2:0]
NUMBER OF UPDATE PERIODS
RESPECTIVE GAIN FACTOR
B3
4x (default)
B2
1x
2x
8x
SPINUP_TIM
B1
E [1:0]
B0
SMSC EMC2105
Datasheet
DEFAULT
0Dh