emc2105 Standard Microsystems Corp., emc2105 Datasheet - Page 51

• Manufacturer Part Number: emc2105
• Description: Emc2105 Rpm-based High Side Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
RPM-Based High Side Fan Controller with Hardware Thermal Shutdown
Datasheet
APPLICATION NOTE: When the APD diode is enabled, there will be a delay of a full temperature update before
SMSC EMC2105
21h
6.10
R/W
R/W
The Configuration Register controls the basic functionality of the EMC2105. The bits are described
below. The Configuration Register is software locked.
Bit 7 - MASK - Blocks the ALERT# pin from being asserted.
Bit 4 - SYS4 - Enables the high temperature limit for the External Diode 4 channel to trigger the Critical
/ Thermal Shutdown circuitry (see
to measure a voltage input. In this case, the External Diode 4 channel is disabled and not compared
against any limits.
Bit 3 - SYS3 - Enables the high temperature limit for the External Diode 3 channel to trigger the Critical
/ Thermal Shutdown circuitry (see
Bit 2 - SYS2 - Enables the high temperature limit for the External Diode 2 channel to trigger the Critical
/ Thermal Shutdown circuitry (see
Bit 1 - SYS1 - Enables the high temperature limit for the External Diode 1 channel to trigger the Critical
/ Thermal Shutdown circuitry (see
Bit 0 - APD - This bit enables the Anti-parallel diode functionality on the External Diode 3 pins (DP3
and DN3).
The Configuration 2 Register controls conversion rate of the temperature monitoring as well as the
fault queue. This register is software locked.
Bit 6 - DIS_DYN - Disables the Dynamic Averaging Feature.
Configuration 2 Register
‘0’ (default) - The ALERT# pin is unmasked. If any bit in either status register is set, the ALERT#
pins will be asserted (unless individually masked via the Mask Register)
‘1’ - The ALERT# pin is masked and will not be asserted.
‘0’ (default) - the External Diode 4 channel high limit will not be linked to the SYS_SHDN# pin. If
the temperature exceeds the limit, the ALERT# pin will be asserted normally.
‘1’ - the External Diode 4 channel high limit will be linked to the SYS_SHDN# pin. If the temperature
exceeds the limit then the SYS_SHDN# pin will be asserted. The SYS_SHDN# pin will be released
when the temperature drops below the high limit. The ALERT# pin will be asserted and released
normally.
‘0’ (default) - The Anti-parallel diode functionality is disabled. The External Diode 3 channel can be
configured for any type of diode
‘1’ - The Anti-parallel diode functionality is enabled. Both the External Diode 3 and 4 channels are
configured to support a diode or diode connected transistor (such as a 2N3904).
‘0’ (default) - The Dynamic Averaging function is enabled. The conversion time for all temperature
channels is scaled based on the chosen conversion rate to maximize accuracy and immunity to
random temperature measurement variation.
REGISTER
Config 2
any comparisons and functionality associated with the External Diode 4 channel will be
implemented. This includes the SYS4 bit operation, limit comparisons, and look up table
comparisons.
B7
-
Table 6.13 Configuration 2 Register
DIS_
DYN
B6
Section
Section
Section
Section
DATASHEET
DIS_
TO
B5
6.1). This bit is ignored if the DP3 / DN3 pins are configured
51
6.1).
6.1).
6.1).
DIS_
AVG
B4
QUEUE[1:0]
B3
B2
B1
CONV[1:0]
Revision 1.74 (05-08-08)
B0
DEFAULT
0Eh