mh1020 Music Semiconductors, Inc., mh1020 Datasheet - Page 16

• Manufacturer Part Number: mh1020
• Description: Hla Packaged Asynchronous Data Recognition And Recall Processor
• Manufacturer: Music Semiconductors, Inc.

Compare Operations
During a Compare operation, the data in the Comparand
register is compared to all locations in the Memory array
simultaneously. Any Mask register used during compares
must be selected beforehand in the Control register. There
are two ways compares are initiated: Automatic compare
and Forced compare.
Automatic compares perform a compare of the contents of
the Comparand register against Memory locations that are
tagged as “Valid,” and occur whenever the following
happens:
•
•
Forced compares are initiated by CMP instructions using
one of the four validity conditions: V, R, S, and E. The
forced compare against “Empty” locations automatically
masks all 64 bits of data to find all locations with the
validity bits set to “Empty,” while the other forced
compares are only masked as selected in the Control
register.
Vertical Cascading
MHs can be vertically cascaded to increase system depth.
Through the use of flag daisy-chaining, multiple devices
respond as an integrated system. The flag daisy chain
allows all commands to be issued globally, with a response
only in the device containing the Highest-Priority
Matching or Next Free location. When connected in a
daisy chain, the last device’s Full flag and Match flag
accurately report the condition for the whole string. A
system in which MHs are vertically cascaded using
daisy-chaining of the flags is shown in Figure 3 on page 7.
To operate the daisy chain, the Device Select registers are
set to FFFFH to enable all devices to execute Command
Write and Data Write cycles. In normal operation, read
cycles
Highest-Priority match by locking the daisy chain (see the
Locked Daisy Chain section). An individual device in the
chain may be targeted for a read or write operation by
temporarily setting the Device Select registers to the Page
address of the target device. Setting the Device Select
registers back to FFFFH restores the operation of the
entire daisy chain.
Match Flag Cascading
The Match Flag daisy chain cascading has three purposes:
first, to allow operations on Highest-Priority Match
addresses to be issued globally over the whole string;
second, to provide a system wide match flag; third, to lock
The Destination Segment counter in the Segment
Control register reaches its end limit during writes to
the Comparand or Mask registers.
After a command write of a TCO CT is executed
(except for a software reset), so that a compare is
executed with the new settings of the Control register.
are
enabled
from
the
device
with
the
16
out all devices except the one with the Highest-Priority
match for instructions such as Status reads after a match.
The Match flag logic causes only the highest-priority
device to operate on its Highest-Priority Match location
while devices with lower-priority matches ignore
Highest-Priority Match operations. The lock-out feature is
enabled by the match flag cascading and the use of the /EC
control signal, as shown in Table 4.
The ripple delay of the flags when connected in a daisy
chain requires the extension of the /E HIGH time until the
logic in all devices has settled out. In a string of “n”
devices, the /E HIGH time should be greater than
If the last device’s Match flag is required by external logic
or a state machine before the start of the next CAM cycle,
one additional tMIVMFV should be added to the /E HIGH
time along with the setup time and delays for the external
logic.
Locked Daisy Chain
In a locked daisy chain, the highest-priority device is the
one with /MI HIGH and /MF LOW. In Standard mode,
only this device responds to command and data reads and
writes, until the daisy chain has been unlocked by taking
/EC HIGH. This allows reading the associated data field
from only the Highest-Priority Match location anywhere
in a string of devices, or the Match address from the Status
register of the device with the match. It also permits
updating the entry stored at the Highest-Priority Match
location. In Enhanced mode, devices are enabled to
respond to some command and data writes, as noted in
Table 4 on page 11, but not command and data reads.
Table 4 (Standard and Enhanced modes) show when a
device responds to reads or writes and when does not,
based on the state of /EC(int), the internal match
condition, and other control inputs. /EC is latched by the
falling edge of /E. /EC(int) is registered from the latched
/EC signal off the rising edge of /E, so it controls what
happens in the next cycle, as shown in Figure 9 on page
16. When /EC is first taken LOW in a string of MH
Figure 9: /EC (Int) Timing Diagram
/E
/EC
/EC (INT)
/MF
tEHMFV + (n-2)
·
tMIVMFV
Rev. 1