zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 49

• Manufacturer Part Number: zl50023
• Description: Enhanced 4 K Channel Tdm Switch With Rate Conversion
• Manufacturer: Zarlink Semiconductor

Note: [n] denotes input stream from 16 - 31.
15 - 0
Bit
External Read Address: 00014
External Read/Write Address: 0100
Reset Value: 0000
Reset Value: 0000
15 - 9
5 - 4
15
8 - 6
0
Bit
BER
L31
15
14
0
BERL[n]
13
BER
0
L30
Name
14
STIN[n]SMP1 - 0
STIN[n]BD2 - 0
H
12
H
0
Table 23 - BER Receiver Lock Register 1 (BERLR1) Bits - Read Only
Unused
Name
BER
L29
13
Table 24 - Stream Input Control Register 0 - 31 (SICR0 - 31) Bits
11
0
BER Receiver Lock[n]:
If BERL[n] is high, it indicates that BER Receiver of STi[n] is locked.
If BERL[n] is low, it indicates that BER Receiver of STi[n] is not locked.
BER
L28
12
10
0
H
H
- 011F
0
9
BER
L27
11
H
Reserved
In normal functional mode, these bits MUST be set to zero
Input Stream[n] Bit Delay Bits.
The binary value of these bits refers to the number of bits that the input stream
will be delayed relative to FPi. The maximum value is 7. Zero means no delay.
Input Data Sampling Point Selection Bits
STIN[n]SMP1-0
STIN[n]
BD2
8
BER
L26
10
00
01
10
11
STIN[n]
Zarlink Semiconductor Inc.
BER
BD1
L25
9
7
ZL50023
BER
L24
STIN[n]
8
BD0
(2.048 Mbps, 4.096 Mbps, 8.192 Mbps
49
6
BER
L23
7
STIN[n]
SMP1
Description
5
BER
Sampling Point
L22
6
Description
streams)
3/4 point
1/4 point
2/4 point
4/4 point
STIN[n]
SMP0
BER
L21
4
5
BER
L20
STIN[n]
4
DR3
3
BER
L19
3
STIN[n]
DR2
2
BER
L18
2
.
STIN[n]
Sampling Point
DR1
(16.384 Mbps
BER
L17
1
1
streams)
2/4 point
4/4 point
Data Sheet
BER
STIN[n]
L16
0
DR0
0