zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 37
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zl50023
Manufacturer Part Number
zl50023
Description
Enhanced 4 K Channel Tdm Switch With Rate Conversion
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50023.pdf
(83 pages)
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17.2
The ZL50023 uses the public instructions defined in the IEEE-1149.1 standard. The JTAG interface contains a
four-bit instruction register. Instructions are serially loaded into the instruction register from the TDi when the TAP
Controller is in its shifted-OR state. These instructions are subsequently decoded to achieve two basic functions: to
select the test data register that may operate while the instruction is current and to define the serial test data
register path that is used to shift data between TDi and TDo during data register scanning.
17.3
As specified in the IEEE-1149.1 standard, the ZL50023 JTAG interface contains three test data registers:
•
•
•
17.4
A Boundary Scan Description Language (BSDL) file is available from Zarlink Semiconductor to aid in the use of the
IEEE-1149.1 test interface.
The Boundary-Scan Register - The Boundary-Scan register consists of a series of boundary-scan cells
arranged to form a scan path around the boundary of the ZL50023 core logic.
The Bypass Register - The Bypass register is a single stage shift register that provides a one-bit path from
TDi to TDo.
The Device Identification Register - The JTAG device ID for the ZL50023 is 0C36714B
Instruction Register
Test Data Registers
BSDL
Version
Part Number
Manufacturer ID
LSB
<31:28>
<27:12>
<11:1>
<0>
Zarlink Semiconductor Inc.
ZL50023
37
0000
1100 0011 0110
0001 0100 101
1
0111
H
Data Sheet