zl50017 Zarlink Semiconductor, zl50017 Datasheet - Page 21

• Manufacturer Part Number: zl50017
• Description: 1 K Digital Switch
• Manufacturer: Zarlink Semiconductor

5.4
In addition to the output bit advancement, the device has a fractional output bit advancement feature that offers
better resolution. The fractional output bit advancement is useful in compensating for varying parasitic load on the
serial data output pins.
By default all of the streams have zero fractional bit advancement such that bit 7 is the first bit that appears after the
output frame boundary. The fractional output bit advancement is enabled by STO[n]FA 1 - 0 (bits 8 - 7) in the
Stream Output Control Register 0 - 15 (SOCR0 - 15). For all streams the fractional bit advancement can vary from
0, 1/4, 1/2 to 3/4 bits.
FPi
STio[n]
Bit Adv = 0
(Default)
STio[n]
Bit Adv = 1
STio[n]
STo[n]FA1-0 = 10
(2, 4 or 8 Mbpa)
STo[n]FA1-0 = 01
(16Mbps)
STio[n]
STo[n]FA1-0 = 11
(2, 4 or 8 Mbps)
FPi
STio[n]
STo[n]FA1-0 = 00
(Default)
STio[n]
STo[n]FA1-0 = 01
(2, 4 or 8 Mbps)
Fractional Output Bit Advancement Programming
Note: Last Channel = 31, 63, 127 and 255 for 2.048, 4.096, 8.192 and 16.384 Mbps modes respectively.
Note: Last Channel = 31, 63, 127 and 255 for 2.048, 4.096, 8.192 and 16.384 Mbps modes respectively.
Figure 11 - Output Fractional Bit Advancement Timing Diagram (ST-BUS)
4 3
Last Channel
3
Last Channel
2 1 0
Figure 10 - Output Bit Advancement Timing Diagram (ST-BUS)
2 1 0
2
1
Last Channel
7
1
Last Channel
7
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3
Last Channel
Last Channel
1
6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2
Bit Advancement = 1
1
Channel 0
Channel 0
0
Zarlink Semiconductor Inc.
0
ZL50017
0
0
21
7
7
Channel 0
7
Fractional Bit Advancement = 1/4 Bit
Fractional Bit Advancement = 1/2 Bit
Channel 0
Fractional Bit Advancement = 3/4 Bit
7
Channel 1
Channel 1
Channel 0
Channel 0
6
6
6
6
5
5
5
5
Channel 2
Channel 2
4
Data Sheet
4
2 1
4