mt9075bpr1 Zarlink Semiconductor, mt9075bpr1 Datasheet - Page 89
mt9075bpr1
Manufacturer Part Number
mt9075bpr1
Description
E1 Single Chip Transceiver With Liu
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9075BPR1.pdf
(102 pages)
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AC Electrical Characteristics
10
‡
DS
CS
R/W
A0-A4
D0-D7
READ
D0-D7
WRITE
11
† Characteristics are for clocked operation over the ranges of recommended operating temperature and supply voltage
* This cycle time is for all accesses other than HDLC FIFOs. For HDLC FIFO accesses, a minimum 100ns is required between successive
Note: DS and CS may be connected together.
1
2
3
4
5
6
7
8
9
Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
Read/Write operations.
RD low
RD High
CS Setup
CS Hold
Address Setup
Address Hold
Data Delay Read
Data Active to High Z Delay
Data Setup Write
Data Hold Write
Cycle Time
Characteristics
*
t
DSH
†
-
Intel Microprocessor Timing
Figure 11 - Motorola Microprocessor Timing
t
t
t
RWS
CSS
ADS
Sym.
t
t
t
t
t
t
t
t
t
t
t
DSW
DHW
RDH
DDR
RDL
CSS
CSH
ADS
ADH
DAZ
CYC
Zarlink Semiconductor Inc.
t
CYC
MT9075B
t
DDR
Min.
110
60
50
10
15
10
10
0
0
89
Typ.
t
DSL
‡
VALID DATA
VALID DATA
t
DSW
Max.
80
80
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
DHW
t
t
t
CSH
RWH
ADH
C
L
=50pF, R
t
Test Conditions
DHR
t
DAZ
L
=1kΩ.
Data Sheet
V
V
V
V
V
V
TT
TT
TT
TT
TT,
TT
V
CT
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