zl30105 Zarlink Semiconductor, zl30105 Datasheet - Page 46

• Manufacturer Part Number: zl30105
• Description: Stratum 3 Redundant System Clock Synchronizer For T1/e1/sdh, Advanced Tca And H.110
• Manufacturer: Zarlink Semiconductor

AC Electrical Characteristics* - OSCi 20 MHz Master Clock Input
* Supply voltage and operating temperature are as per Recommended Operating Conditions.
7.2
Performance Characteristics* - Functional
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
Reference Out of Range Threshold
Performance Characteristics
Oscillator Tolerance - DS1
Oscillator Tolerance - E1
Oscillator Tolerance - PDH Stratum 3
Oscillator Tolerance - SDH
Duty cycle
Rise time
Fall time
Holdover accuracy
Holdover stability
Freerun accuracy
DS1 / E1
PDH Stratum 3 / SDH
DS1
E1
PDH Stratum 3 / SDH
DS1 (1.8 Hz filter - all reference
frequencies)
(including hysteresis)
Capture range
Lock Time
Characteristics
Characteristics
Zarlink Semiconductor Inc.
ZL30105
Min.
Min.
-130
-100
-130
-4.6
-4.6
-9.2
-32
-50
-12
-64
-83
-12
40
40
46
Max.
Max.
+130
+100
+130
+4.6
+4.6
0.01
+9.2
+32
+50
+12
+64
+83
+12
60
10
10
40
0
0
Units
Units
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ns
ns
%
s
The 20 MHz master clock oscillator
Determined by stability of the
20 MHz master clock oscillator
Determined by accuracy of the
20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
The 20 MHz master clock oscillator
set at 0 ppm
±64 ppm frequency offset,
SEC_MSTR = 0, HMS = 1,
TIE_CLR = 1, and FASTLOCK=0.
Notes
Notes
Data Sheet