zl30105 Zarlink Semiconductor, zl30105 Datasheet - Page 28

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zl30105

Manufacturer Part Number
zl30105
Description
Stratum 3 Redundant System Clock Synchronizer For T1/e1/sdh, Advanced Tca And H.110
Manufacturer
Zarlink Semiconductor
Datasheet

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The method of synchronization using REF2 and REF2_SYNC is enabled as soon as a valid 2 kHz or 8 kHz frame
pulse is detected on the REF2_SYNC input. The REF2_SYNC pulse must be generated from the clock that is
present on the REF2 input. The ZL30105 checks the number of REF2 cycles in the REF2_SYNC period. If this is
not the nominal number of cycles, the REF2_SYNC pulse is considered invalid. For example, if REF2 is a
8.192 MHz clock and REF2_SYNC is a 8 kHz frame pulse, then there must be exactly 1024 REF2 cycles in a
REF2_SYNC period. If a valid REF2_SYNC pulse is detected, the ZL30105 will align the rising edges of the REF2
clock and the corresponding output clock such that the rising edge of the F8o/F32o output frame pulse is aligned
with the frame boundary indicated by the REF2_SYNC signal. The rising edges of the REF2 and the corresponding
output clock that are aligned, are the ones that lag the rising edges of the REF2_SYNC and the F8o pulses
respectively. This is illustrated in Figure 18. Many combinations of the ZL30105 clock and frame pulse outputs can
be used as REF2 and REF2_SYNC inputs. In general, the active low frame pulses F4o, F16o and F65o would be
inverted first before used as a REF2_SYNC input.
REF2_SYNC = 2 kHz
REF2 = C19o
REF2 = C8o
REF2_SYNC = 8 kHz
F2ko
C19o
C8o
F8o
Figure 18 - Examples of REF2 & REF2_SYNC to Output Alignment
Zarlink Semiconductor Inc.
ZL30105
aligned
28
aligned
Data Sheet

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