tea5764uk-n2 NXP Semiconductors, tea5764uk-n2 Datasheet - Page 30

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tea5764uk-n2

Manufacturer Part Number
tea5764uk-n2
Description
Fm Radio + Rds
Manufacturer
NXP Semiconductors
Datasheet
Fig 13. RDS flag behavior
(1) Normally reading byte19R would reset bit DAVN, but now it is reset after 10 ms, the maximal LOW time of bit DAVN.
(2) Read of byte15R in DAV-A and DAV-B mode clears DAVFLG. In DAV-C mode two consecutive RDS data blocks are read and hence DAVFLG is reset after reading
(3) Read of byte19R clears bit DAVN.
(4) Write byte0W (interrupt register).
Blocking DAVFLG: at end of reading byte15R or byte17R (DAV-A, B/C) DAVFLG is forced to zero. Only after reading byte19R DAVFLG is released again.
If synchronous reading is performed using ASIC generated interrupts, this problem does not occur.
To prevent undefined situations, byte12R to byte19R should always be read in one action immediately after each other.
Signal DAVN
byte17R instead of byte15R (dotted line).
RDS data
DAVN
DAVFLG
reset of DAVFLG
Read byte:
10.5 RDS flag behavior during read action
A
INTX.
0R
15R
(2)
17R
19R 0W
B
(3)
0R
15R
17R
19R 0W
C
(4)
0R
15R
17R
19R 0W
D
0R
15R
17R
19R 0W
A
0R
15R
17R
19R 0W
10 ms
0R
15R
17R
B
19R 0W
(1)
001aab475
C

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