tea5764uk-n2 NXP Semiconductors, tea5764uk-n2 Datasheet - Page 18

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tea5764uk-n2

Manufacturer Part Number
tea5764uk-n2
Description
Fm Radio + Rds
Manufacturer
NXP Semiconductors
Datasheet
Fig 6. I
(1) Interrupt events that occur outside of the region A-B set their respective flag bits in the normal way immediately and can thus trigger a hardware interrupt if the mask
(2) The blocking of interrupts is marked by the region A-B
(3) Interrupt events that occur between A and B set their respective flags after the mask bits are cleared. Which means that in this diagram an interrupt event occurred in
(4) All interrupt mask bits are cleared after the interrupt flag and mask bytes are read.
(5) Software writes to the mask byte and enables the required mask bits. Any flags currently set will then trigger a hardware interrupt.
(6) INTX is set HIGH (inactive) after the interrupt mask bytes are read.
bits are set.
B
B
period A-B, so after A-B the flag goes to logic 1.
2
1
2
C-bus interrupt sequence, read and write operation
is when only the INTFLAG is read and a stop condition is received (only INTFLAG is read so only this will be cleared).
is when both registers are read and hence cleared and this is terminated by either an acknowledge or stop bit.
data
interrupt event
interrupt flag bit
interrupt mask bit
INTX
read access
S
address
device
R
(1)
A
A
0R data
INTFLAG
A
B
1
1R data
INTMSK
1
(2)
/ B
2
depending on the actual read cycle.
A
B
2
(3)
(4)
(6)
data
A
write access
S
address
device
W
A
0W data
INTMSK
A
FRQSETMSB FRQSETLSB
(5)
(5)
1W data
A
2W data
A
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