wm8199scds-v Wolfson Microelectronics plc, wm8199scds-v Datasheet
wm8199scds-v
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wm8199scds-v Summary of contents
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... WM8199 DVDD2 VRT VRX VRB VREF/BIAS + POLARITY ADJUST DATA I/O M 16- BIT PORT + U X ADC POLARITY ADJUST + POLARITY CONFIGURABLE ADJUST SERIAL CONTROL INTERFACE DGND Production Data, July 2008, Rev 4.4 Copyright ©2008 Wolfson Microelectronics plc OEB OP[0] OP[1] OP[2] OP[3] OP[4] OP[5] OP[6] OP[7]/SDO SEN SCK SDI RLC/ACYC ...
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WM8199 DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 THERMAL PERFORMANCE .................................................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TYPICAL HIGH SPEED PERFORMANCE..................................................................... 8 INPUT ...
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... AGND2 2 DVDD1 3 OEB 4 VSMP 5 RLC/ACYC 6 MCLK 7 DGND 8 SEN 9 DVDD2 10 SDI 11 SCK 12 OP[0] 13 OP[1] 14 ORDERING INFORMATION TEMPERATURE DEVICE RANGE o WM8199SCDS WM8199SCDS/ Note: Reel quantity = 2,000 w 28 GINP 27 BINP 26 VRLC/VBIAS 25 VRX 24 VRT 23 VRB 22 AGND1 21 AVDD 20 OP[7]/SDO 19 OP[6] 18 OP[5] 17 OP[4] 16 OP[3] 15 OP[2] MOISTURE SENSITIVITY ...
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WM8199 PIN DESCRIPTION PIN NAME TYPE 1 RINP Analogue input 2 AGND2 Supply 3 DVDD1 Supply 4 OEB Digital input 5 VSMP Digital input 6 RLC/ACYC Digital input 7 MCLK Digital input 8 DGND Supply 9 SEN Digital input 10 ...
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WM8199 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics ...
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WM8199 ELECTRICAL CHARACTERISTICS Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions) Conversion rate Full-scale input voltage range (see Note 1) ...
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WM8199 Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Programmable Gain Amplifier Resolution Gain Max gain, each channel Min gain, each channel Gain error, each channel Analogue to Digital Converter Resolution ...
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WM8199 TYPICAL HIGH SPEED PERFORMANCE The WM8199 is capable of operating at speeds greater than 20MSPS with a reduction in linearity. Figures 1 and 2 below show the typical 8-bit performance at 30MSPS. 0.25 0.2 0.15 0.1 0. ...
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WM8199 INPUT VIDEO SAMPLING t MCLK t VSMPSU VSMP INPUT VIDEO Figure 3 Input Video Timing Note: 1. See Page 20 (Programmable VSMP Detect Circuit) for video sampling description. Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND ...
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WM8199 OEB OP[7:0] Hi-Z Figure 5 Output Data Enable Timing Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T PARAMETER Output propagation delay Output enable time Output disable time MCLK t ACYCSU RLC/ACYC ...
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WM8199 Test Conditions AVDD = DVDD1 = 5.0V, DVDD2 = 23.3V, AGND = DGND = 0V, T PARAMETER SCK period SCK high SCK low SDI set-up time SDI hold time SCK to SEN set-up time SEN to SCK set-up time ...
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WM8199 INTERNAL POWER ON RESET CIRCUIT Figure 8 Internal Power On Reset Circuit Schematic The WM8199 includes an internal Power-On-Reset Circuit, as shown in Figure 8, which is used to reset the digital logic into a default state after power ...
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WM8199 Figure 10 Typical Power up Sequence where DVDD1 is Powered before AVDD Figure 10 shows a typical power-up sequence where DVDD1 is powered up first assumed that DVDD1 is already up to specified operating voltage. When AVDD ...
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WM8199 DEVICE DESCRIPTION INTRODUCTION A block diagram of the device showing the signal path is presented on Page 1. The WM8199 samples up to three inputs (RINP, GINP and BINP) simultaneously. The device then processes the sampled video signal with ...
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WM8199 EXTERNAL VRLC Figure 11 Reset Level Clamping and CDS Circuitry If auto-cycling is not required, RLC can be selected by pin RLC/ACYC. Figure 12 illustrates control of RLC for a typical CCD waveform, with CL applied during the reset ...
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WM8199 R /CL (CDSREF = 00 /CL (CDSREF = 01 /CL (CDSREF = 10 /CL (CDSREF = 11) S Figure 13 Reset Sample and Clamp Timing For CIS type sensor signals, non-CDS processing is ...
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WM8199 OVERALL SIGNAL FLOW SUMMARY Figure 16 represents the processing of the video signal through the WM8199 RESET V VRLC VRLCEXT=1 Figure 16 Overall Signal Flow The INPUT SAMPLING BLOCK produces an effective input voltage V difference ...
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WM8199 OFFSET DAC BLOCK: OFFSET (BLACK-LEVEL) ADJUST The resultant signal V PGA NODE: GAIN ADJUST The signal is then multiplied by the PGA gain, ADC BLOCK: ANALOGUE-DIGITAL CONVERSION The analogue signal is then converted to a 16-bit unsigned number, with ...
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WM8199 CONTROL INTERFACE The internal control registers are programmable via the serial digital control interface. The register contents can be read back via the serial interface on pin OP[7]/SDO. Note recommended that a software reset is carried out ...
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WM8199 PROGRAMMABLE VSMP DETECT CIRCUIT The VSMP input is used to determine the sampling point and frequency of the WM8199. Under normal operation a pulse of 1 MCLK period should be applied to VSMP at the desired sampling frequency (as ...
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WM8199 POWER MANAGEMENT Power management for the device is performed via the Control Interface. The device can be powered on or off completely by setting the EN bit and SELPD bit low. Alternatively, when control bit SELPD is high, only ...
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WM8199 OPERATING MODES Table 5 summarises the most commonly used modes, the clock waveforms required and the register contents required for CDS and non-CDS operation. MODE DESCRIPTION CDS AVAILABLE 1 Colour Yes Pixel-by-Pixel 2 Monochrome/ Yes Colour Line-by-Line 3 Fast ...
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WM8199 OPERATING MODE TIMING DIAGRAMS The following diagrams show 8-bit multiplexed output data and MCLK, VSMP and input video requirements for operation of the most commonly used modes as shown in Table 5. The diagrams are identical for both CDS ...
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WM8199 Figure 25 Mode 3 Operation Figure 26 Mode 4 Operation w Production Data PD, Rev 4.4, July 2008 24 ...
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WM8199 16.5 MCLK PERIODS MCLK VSMP INPUT VIDEO OP[7: (DEL = 00) OP[7: (DEL = 01) ...
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WM8199 DEVICE CONFIGURATION REGISTER MAP The following table describes the location of each control bit used to determine the operation of the WM8199. The register map is programmed by writing the required codes to the appropriate addresses via the serial ...
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WM8199 REGISTER MAP DESCRIPTION The following table describes the function of each of the control bits shown in Table 6. REGISTER BIT BIT NO NAME(S) Setup 0 EN Register 1 1 CDS 2 MONO 3 SELPD 5:4 PGAFS[1:0] 6 MODE4 ...
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WM8199 REGISTER BIT BIT NO NAME(S) Setup 0 LINEBYLINE Register 4 1 ACYCNRLC 2 FME 3 RLCINT 5:4 INTM[1:0] 7:6 FM[1:0] Setup 0 VSMPDET Register 5 3:1 VDEL[2:0] 4 POSNNEG 7:5 Reserved Setup 3:0 SELDIS[3:0] Register 6 7:4 Reserved w ...
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WM8199 REGISTER BIT BIT NO NAME(S) Offset DAC 7:0 DAC[7:0] (Red) Offset DAC 7:0 DAC[7:0] (Green) Offset DAC 7:0 DAC[7:0] (Blue) Offset DAC 7:0 DAC[7:0] (RGB) PGA gain 7:0 PGA[7:0] (Red) PGA gain 7:0 PGA[7:0] (Green) PGA gain 7:0 PGA[7:0] ...
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WM8199 RECOMMENDED EXTERNAL COMPONENTS DVDD1 DVDD2 C1 C2 AVDD DGND AGND Video Inputs AGND Timing Signals Interface Controls NOTES: 1. C1-9 should be fitted as close to WM8199 as possible. 2. AGND and DGND should be connected as close to ...
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WM8199 PACKAGE DIMENSIONS DS: 28 PIN SSOP (10.2 x 5.3 x 1.75 mm Dimensions Symbols (mm) MIN NOM A ----- A 0. 1.65 1. 0.22 c 0.09 D 9.90 10.20 ...
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... WM8199 IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...