ml22808 Oki Semiconductor, ml22808 Datasheet - Page 7

• Manufacturer Part Number: ml22808
• Description: Oki Adpcm Algorithm-based Speech Synthesis Lsi
• Manufacturer: Oki Semiconductor

PIN DESCRIPTION
OKI Semiconductor
(TEST2)
(SEL)
19,24
Pin
10
11
12
13
14
18
22
23
1
2
3
4
5
6
7
8
9
TESTO0
TESTO1
Symbol
TEST0
TEST1
RESET
DGND
PGND
BUSY
DIPH
SEL0
SEL1
PV
NCR
SCK
XT
XT
CS
DI
DD
Type
—
—
—
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
Connects to a crystal or a ceramic resonator.
A feedback resistor of around 1 MΩ is built in between this XT pin and
XT pin. When using an external clock, input the clock from this pin.
If a crystal or a ceramic resonator is used, connect it as close to the LSI
as possible.
Connects to a crystal or a ceramic resonator.
When using an external clock, leave this pin open.
If a crystal or a ceramic resonator is used, connect it as close to the LSI
as possible
Input pin for testing. Tie this pin at a “L” level (DGND level).
Input pin for testing. Tie this pin at a “L” level (DGND level).
Digital ground pin.
Pin for choosing between rising edges and falling edges as to the edges
of the SCK pulses used for shifting serial data input to the DI pin into the
inside of the LSI. When this pin is at a “L” level, DI input data is shifted
into the LSI on the rising edges of the SCK clock pulses; when this pin is
at a “H” level, DI input data is shifted into the LSI on the falling edges of
the SCK clock pulses.
Memory bank selecting pin. Enabled when memory bank selecting is
specified at the time the PUP1 or PUP2 command is input. Do not
change during speech playback (when the BUSY pin is at “L”)
ML22808/ML22804/ML22P808/ML22P804:
Memory bank selecting pin. Enabled when memory bank selecting is
specified at the time the PUP1 or PUP2 command is input. Do not
change during speech playback (when the BUSY pin is at “L”)
ML22802/ML22P802:
Input pin for testing. Tie this pin at “L” (DGND level).
Chip select input pin.
A “L” level on this pin enables the serial interface.
Serial clock input pin.
Serial data input pin.
Pin that outputs a signal that indicates the phrase playback status.
If the LSI is playing a phrase, this pin outputs a “L” level.
If the LSI is in a standby state, this pin outputs a “H” level.
Pin that outputs a signal that indicates whether command input is
enabled or disabled.
If command input is enabled, this pin outputs a “H” level.
If command input is disabled, this pin outputs a “L” level.
During a reset input, the entire circuit is stopped and enters a power
down state.
Upon power-on, input a “L” level to this pin. Put this pin into a “H” level
after the power supply voltage is stabilized.
Output pin for testing. Leave this pin open.
Ground pin for the internal P2ROM.
Power supply pin for the internal P2ROM.
Connect a capacitor of 0.1 µF or more between this pin and PGND.
Output pin for testing. Leave this pin open.
Description
ML22808/ML22804/ML22802-XXX
FEDL2280XDIGEST-03
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