msm7583 Oki Semiconductor, msm7583 Datasheet - Page 8

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msm7583

Manufacturer Part Number
msm7583
Description
Shift Qpsk Modem
Manufacturer
Oki Semiconductor
Datasheet
¡ Semiconductor
RXD1, RXC1, RXSC1
RXD2, RXC2, RXSC2
SLS11, SLS21, SLS12, SLS22
RXD0, RXC0, RXSC0
Channel 1 receive data, receive clock, and receive symbol clock output pins.
During power-on, these output pins are at the output level of the clock recovery circuit selected
by a combination of SLS11 and SLS21 (described later). (Refer to Fig. 3.)
Channel 2 receive data, receive clock, and receive symbol clock output pins.
During power-on, these output pins are at the output level of the clock recovery circuit selected
by a combination of SLS12 and SLS22 (described later). (Refer to Fig. 3.)
Receiver slot select signal pins of Channel 1 (SLS11, SLS21) and Channel 2 (SLS12, SLS22).
The MSM7583 has four sets of clock recovery circuits and four AFC information storage
registers. One of the sets is selected according to a combination of the signals at these pins.
(Refer to Fig. 3.)
Channel 1 (SLS21, SLS11) = (0, 0): Slot 1, (0, 1): Slot 2
Channel 2 (SLS22, SLS12) = (0, 0): Slot 1, (0, 1): Slot 2
Receive data, receive clock, and receive symbol clock outputs.
These pins are at the output level selected by RXSEL (described below).
RXD1 (RXD2)
RXC1 (RXC2)
RXSC1 (RXSC2)
SLS21 (SLS22)
SLS11 (SLS12)
Figure 3 RXD, RXC, and RXSC Timing Diagram
(1, 0): Slot 3, (1, 1): Slot 4
(1, 0): Slot 3, (1, 1): Slot 4
The recovery data and clock pulse are
selected asynchronously by the SLS signals.
MSM7583
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