msm7583 Oki Semiconductor, msm7583 Datasheet - Page 6

• Manufacturer Part Number: msm7583
• Description: Shift Qpsk Modem
• Manufacturer: Oki Semiconductor

¡ Semiconductor
V
AGND
DGND
SG
RESET
PDN0, PDN1, PDN2
Standby Mode
Communication
Mode
DD
+5 V power supply voltage.
Analog signal ground.
Digital signal ground.
AGND and DGND are not connected in the device. This pin should be tied to the AGND pin
on the PCB as close as possible from the device.
AGND and DGND should be connected as close as prossible on the PC board.
Internal reference voltage output.
The output voltage is about 2.0 V. A bypass capacitor should be connected between this pin
and the AGND pin. The external SG voltage, if necessary should be used via buffer.
Control register reset.
When this pin is set to "0", the register is reset to the initial value.
The reset signal input width is 200 ns or more.
Inputs for power-down control.
PDN0 controls the standby/communication modes, PDN1 controls the modulator, and PDN2
controls the demodulator. Refer to Table 1 for details.
PDN0
0
0
1
1
1
1
PDN1
—
—
0
1
0
1
PDN2
Table 1 Power Down Control
0
1
0
0
1
1
All power-down.
Modulator power is off (VREF and PLL power is also off).
Demodulator power is on.
Modulator power is off (VREF and PLL power is on).
I and Q outputs are in a high-impedance state.
Only demodulator clock recovery block power is on.
Modulator power is on.
Only demodulator clock recovery block power is on.
Modulator power is off (VREF and PLL power is on).
I and Q outputs are in a high-impedance state.
Demodulator power is on.
Modulator power is on.
Demodulator power is on.
Function
MSM7583
Mode A
Mode B
Mode C
Mode D
Mode E
Mode F
Mode
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