msm7583 Oki Semiconductor, msm7583 Datasheet

no-image

msm7583

Manufacturer Part Number
msm7583
Description
Shift Qpsk Modem
Manufacturer
Oki Semiconductor
Datasheet
¡ Semiconductor
¡ Semiconductor
MSM7583
p/4 Shift QPSK MODEM
E2U0036-28-81
GENERAL DESCRIPTION
The MSM7583 is a CMOS IC for the p/4 shift QPSK modem developed for the digital cordless
telephone systems.
The device, which contains one system of modulator and two systems of demodulater, is
optimized for applications for cell stations in a cordless telephone system.
FEATURES
• Single +5 V Power Supply: 4.5 V to 5.5 V
(Modulator Block)
• Built in Root Nyquist Filter for Baseband Limitting (50% Roll-off)
• Ramp Bit for Burst Signal Rise-up (Fall-down) : 2 Symbols
• Built-in D/A converters for Analog Outputs of Quadrature Signal I/Q Components and
• Differential I/Q Analog Output Type
• I/Q Output, DC Offset/Amplitude Adjustable
(Demodulator Block)
• Built-in Diversity-corresponding Demodulation Circuit: 2 Systems
• Full Digital p/4 Shift QPSK Demodulation System
• Input IF Signal Frequency Selectable: 1.2/10.7/10.75/10.8 MHz
• Built-in Clock Recovery: 4 Circuits
• Transmit/Receive Independent Power-down Control capability
• Built-in Precise Analog Voltage Reference
• MCU Serial Interface for Mode Setting and Built-in Test Circuit
• Test Modes: Eye Pattern/AFC Compensating Signal/Phase Detection Signal Monitoring
• Transmission Speed: 384 kbps
• Low Power Consumption
• Package:
64-pin plastic QFP (QFP64-P-1414-0.80-BK)(Product name : MSM7583GS-BK)
I + Q
2
Operating Mode: 16 mA Typ./Modulator (V
Whole Power-down Mode: 0.03 mA Typ. (V
2
(Analog) Power Envelope Output.
Capability
28 mA Typ./Demodulator (V
DD
DD
= 5.0 V)
DD
= 5.0 V)
= 5.0 V)
Previous version: Nov. 1996
This version: Aug. 1998
MSM7583
1/23

Related parts for msm7583

msm7583 Summary of contents

Page 1

... MSM7583 p/4 Shift QPSK MODEM GENERAL DESCRIPTION The MSM7583 is a CMOS IC for the p/4 shift QPSK modem developed for the digital cordless telephone systems. The device, which contains one system of modulator and two systems of demodulater, is optimized for applications for cell stations in a cordless telephone system. ...

Page 2

... SL21 E DPLL C SL31 SL41 Delay Detector AFC Root Nyquist D/A LPF I output gain adjust D/A 3.84 MHz To D/A Q output gain adjust To monitor D/A output of each block TEST1, TEST0 (From CR) MSM7583 SLS11 SLS21 AFC1 RXD1 Decision RXC1 RXSC1 RCW1 RPR1 RXD0 S E RXC0 L RXSC0 RXSEL S ...

Page 3

... MCK 4 DGND IFIN2 5 6 DGND 7 IFIN1 DGND DOUT 10 11 DIN 12 EXCK 13 DEN 14 RESET 15 PDN0 PDN1 connect pin 64-Pin Plastic QFP MSM7583 SLS22 46 SLS12 45 RXSC1 44 RXC1 43 RXD1 42 SLS21 41 SLS11 ENV 38 Q– I– ...

Page 4

... The level of the outputs is 500 mVpp with 1.6 Vdc as center value. The output pin load conditions are £ 20 pF. The gain of these pins can be adjusted using the control registers CR1 - B3 to B0, and the offset voltage at the Q– pin can be adjusted using CR4 - B7 to B3. MSM7583 4/23 ...

Page 5

... TXCI (384 kHz) TXW BSTO Figure 1 Transmitter Timing Diagram ) output D10 D11 D12 D13 symbols Delay of 6.25 symbols D10 D11 D12 D13 symbols Delay of 6.25 symbols N+1 N+2 MSM7583 Ramp fall-down 2 symbols Ramp fall-down 2 symbols N+16 N+17 N+18 N+19 5/23 ...

Page 6

... Modulator power is on. 0 Only demodulator clock recovery block power is on. Modulator power is off (VREF and PLL power is on and Q outputs are in a high-impedance state. Demodulator power is on. Modulator power is on. 1 Demodulator power is on. MSM7583 Mode Mode A Mode B Mode C Mode D Mode E Mode F 6/23 ...

Page 7

... X1, X2 Crystal oscillator connection pins. When supplying a 19.0222 MHz or 19.1111 MHz clock to IFCK, use these pins. (Refer to Fig. 2.) When IFIN = 10.7 MHz or 10.75 MHz MSM7583 X1 X2 19.0222 MHz or 19.1111 MHz Figure 2 How to Use IFCK, X1, and X2 When IFIN = 1.2 MHz or 10.8 MHz IFCK X1 MSM7583 MSM7583 X2 IFCK 7/23 ...

Page 8

... SLS11, SLS21, SLS12, SLS22 Receiver slot select signal pins of Channel 1 (SLS11, SLS21) and Channel 2 (SLS12, SLS22). The MSM7583 has four sets of clock recovery circuits and four AFC information storage registers. One of the sets is selected according to a combination of the signals at these pins. ...

Page 9

... AFC RPR The clock recovery circuit starts with the previous AFC information. Figure 4 AFC Control Timing Diagram Average number of times Average AFC is high. number of times AFC is low. “0” Average number of times AFC is high. MSM7583 AFC information is maintained. AFC information is maintained. 9/23 ...

Page 10

... Serial control ports for the microprocessor interface. The MSM7583 contains a 6-byte control register. An external CPU uses these pins to read data from and write data to the control register. DEN is the "Enable" signal input pin. EXCK is a data shift clock pulse input pin. DIN is an address and data input pin. DOUT is a data output pin ...

Page 11

... GAIN2 GAIN1 GAIN0 Ich Ich Ich Ich Offset3 Offset2 Offset1 Offset0 Qch Qch Qch Qch Offset3 Offset2 Offset1 Offset0 LOCAL ICT6 ICT5 ICT4 INV1 MSM7583 R ENVSEL TEST1 TEST0 R/W Qch Qch Qch R/W GAIN2 GAIN1 GAIN0 — — — R/W R/W — — — ...

Page 12

... DD Mode D (when V = 5.0 V) — DD Mode E (when V = 5.0 V) — DD — Mode F (when –1.6 mA 0.0 OL — — — — MSM7583 Rating Unit –0 0 –55 to +150 °C Typ. Max. Unit — 5.5 V +25 +70 °C — — ...

Page 13

... IFV IFIN input level RIF — CIF — VSG — RSG — SG´AGND 0 (Rise Time to 90% of max. SG level.) F — SDA F — CDA MSM7583 = 4 5 –25°C to +70°C) DD Min. Typ. Max. Unit 10 — — — — 20 1.55 1.6 1.65 — — 1.77 — 1.67 — ...

Page 14

... load = 50 pF Fig M10 t M11 f — EXCK EXCK MSM7583 = 4 5 –25°C to +70°C) DD Min. Typ. Max. Unit 200 — — 200 — — 0 — 200 0 — 200 0 — 200 0 — 200 10 — ...

Page 15

... AFC RPR RXC t RD1 RXD Figure 7 Receiver (Demodulator) Digital Input/Output Timing When CR0 - B6 = "1", TXCO is indicated XD2 XD3 t RW MSM7583 N XD1 N+1 N+16 N+17 N+18 t XD4 t t RS1 RS2 t t RS3 RS4 ...

Page 16

... Semiconductor DEN t M2 EXCK DIN W/R A2 DOUT Figure 8 Serial Control Port Interface MSM7583 t M10 M11 B1 B0 16/23 ...

Page 17

... AFC information output MODOFF IFSEL1 IFSEL2 output selection output 1 output 1/Channel 2 receive monitor output output MSM7583 ENVSEL TEST1 TEST0 17/23 ...

Page 18

... MSM7583 Qch Qch Qch GAIN2 GAIN1 GAIN0 — — — ENV Amplitude (value relative to the reference (1.000 0)) 1.126 1.108 1 ...

Page 19

... MSM7583 — — — — — — and Q offset B4 B3 (mV – – – –12 ...

Page 20

... Mode D PDN1 = 1 PDN2 = Figure 9 Power-Down State Transition Time LOCAL ICT5 ICT4 INV1 Mode A PDN1 = 0 PDN2 = Mode C PDN1 = 0 PDN2 = Mode F PDN1 = 1 PDN2 = 1 MSM7583 LOCAL ICT1 ICT0 INV0 Mode B PDN1 = 0 PDN2 = 1 Mode E PDN1 = 0 PDN2 = 1 20/23 ...

Page 21

... V DD ENV Q– Q+ I– AGND 0 1000 pF MSM7583 Receive symbol clock output Receive clock output Receive data output Receive channel select signal Receive symbol clock 2 output Receive clock 2 output Receive data 2 output 48 47 Demodulator 2 46 control signal ...

Page 22

... R3 "0" "1" "1" "0" bits ------------- bits 8 bits PR UW ------------- Loss than 30 bits MSM7583 Slot "1" "1" R4 ------------- Guard bit R: Ramp bit SS: Start symbol bit ...

Page 23

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7583 (Unit : mm) Package material Epoxy resin ...

Related keywords