ml7074-003 Oki Semiconductor, ml7074-003 Datasheet - Page 42

• Manufacturer Part Number: ml7074-003
• Description: Dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free Msm7731-02dual Echo Canceler & Noise Canceler With Dual Codec For Hands-free
• Manufacturer: Oki Semiconductor

METHOD OF INTERNAL DATA MEMORY ACCESS
The default values such as the cancelable echo delay time, echo attenuation and noise attenuation can be changed
during the initial mode (CR0-B1, CR0-B0 = “00”).
Refer to the procedure below.
After the write operation is complete, the write command (CR1-B7) is cleared to “0”. Consecutive writes are
possible.
(Example)
Please note that the MSM7731-02 used in the following setting will shift into PDWN power-down mode when the
SYNC and BCLK externally supplied stop. The MSM7731-02 automatically returns to normal operation mode
when the SYNC and BCLK resume being supplied, but at the same time the set data memories (internal
coefficient) are initialized.
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OKI Semiconductor
1. Set the address of the default value store memory. (CR6, 7)
2. Set the modified values (data). (CR8, 9)
3. Set the write command. (CR1-B7 = "1")
CLKSEL-pin = digital “1” (external clock mode)
CR12-B0 (SYPDN bit) = “0”
In the case of changing the acoustic delay time in a single echo canceler mode to 30 ms.
Address: 009Bh, Data: 00F0h
Set other memory?
CR7 = 9Bh
CR6 = 00h
CR8 = 00h
CR9 = F0h
CR1 = 80h
CR1 = 00h
START
END
No
Yes
No
Yes
Upper address setting
Lower address setting
Upper data setting
Lower data setting
Write control
Write complete confirmation
FEDL7731-02-11
MSM7731-02
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