ak4561 AKM Semiconductor, Inc., ak4561 Datasheet - Page 45

• Manufacturer Part Number: ak4561
• Description: 16bit Codec With Built-in Alc And Mic/hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
n FADEIN Mode
In FADEIN Mode, the IPGA value is increased at the value set by FDATT when FDIN bit changes from “0” to “1”.
The update period can be set by FDTM1-0 bits. The FADEIN Mode is always detected by the zero crossing operation.
This operation is kept over the REF value or until the limiter operation at once. If the limiter operation is done during
FADAIN cycle, the FADEIN operation becomes the ALC operation.
NOTE: When FDIN and FDOUT bits are “1”, FDOUT operation is enabled.
(1) WR (ALC = FDIN = “0”): The ALC operation is disabled. To start the FADEIN operation, FDIN bit is written in “0”.
(2) WR (IPGA = “MUTE”): The IPGA output is muted.
(3) WR (ALC = FDIN = “1”): The FADEIN operation starts. The IPGA changes from the MUTE state to the FADEIN
(4) The FADEIN operation is done until the limiter detection level (LMTH) or the reference level (REF6-0). After
(5) FADEIN time can be set by FDTM1-0 and FDATT bits
Rev. 0.9
completing the FADEIN operation, the AK4561 becomes the ALC operation.
E.g. FDTM1-0 = 32ms, FDATT = 1step
(96 x FDTM1-0) / FDATT = 96 x 32ms / 1 = 3.07s
IPGA Ouput
ALC bit
FDIN bit
Figure 33. Example for controlling sequence in FADEIN operation
operation.
AKM CONFIDENTIAL
(1) (2)
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(3)
(5)
(4)
[AK4561]
2000/09