lc01700pw Sanyo Semiconductor Corporation, lc01700pw Datasheet - Page 7

• Manufacturer Part Number: lc01700pw
• Description: Fm Tuner Ic For Vics
• Manufacturer: Sanyo Semiconductor Corporation

3. Data transmission
4. Acknowledge (Confirmation of reception)
The length of each byte output to the SDA line is always 8 bits. An acknowledge bit is always necessary after each byte,
Data is transmitted sequentially from the most significant bit (MSB).
During data transfer, the slave address is transmitted after the "Start" condition (S). Data transfer is always ended by the
"Stop" condition (P) generated by the master.
When the master generates the acknowledge clock pulse, the transmitter opens the SDA line (SDA line entering the
"H" state). When the acknowledge clock pulse is in the "H" state, the receiver sets the SDA line to "L" each time it
receives one byte (eight bits) of data. When the master functions as receiver, the master informs the end of data to the
slave by omitting acknowledgement at the end of data sent from the slave.
START or
repeated START condition
ACK ; acknowledgement
SDA
SCL
Dataoutput by
Transmitter
Dataoutput by
Receiver
SCL from
Master
Sr
or
S
significant bit
of MSB
Most-
START condition
D7
1
S
D6
2
D1
7
ACK signal from slsave
1
clock pulse for ACK
byte complete,
interrupt within slave
D0
8
NACK ; not acknowledgement
ACK ; acknowledgement
LC01700PW
9
clock line held low while
interrupts are serviced
2
1
clock pulse for ACK
2
ACK signal from receiver
3-8
Release the SDA line(HIGH)
8
9
NACK(master is reciever)
ACK(master is transmitter)
STOP or
repeated START condition
clock pulse for ACK
Sr
Sr
or
P
P
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