adate302-02 Analog Devices, Inc., adate302-02 Datasheet - Page 34

• Manufacturer Part Number: adate302-02
• Description: 500 Mhz Dual Integrated Dcl With Differential Drive/receive, Level Setting Dacs, And Per Pin Pmu
• Manufacturer: Analog Devices, Inc.

ADATE302-02
SERIAL PERIPHERAL INTERFACE DETAILS
Table 17. Serial Peripheral Interface Timing Requirements
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
CH
CL
CSHA
CSSA
CSHD
CSSD
DH
DS
DO
CSW
CSTP
Extra cycle is needed after read request to prime read data into SPI shift register.
SDOUT
SCLK
SDIN
CS
Parameter
SCLK minimum high
SCLK minimum low
CS assert hold
CS assert setup
CS deassert hold
CS deassert setup
SDIN hold
SDIN setup
SDOUT Data Out
CS minimum between assertions
CS minimum directly after a read request
Minimum delay after CS is deasserted before SCLK can be
stopped (not shown in
operations to complete
t
CSHA
DATA[15]
t
DS
t
CSSA
DO_15
DATA[14]
LAST
Figure 75
DO_14
t
DH
); this allows any internal
1
LAST
DO_13
t
Figure 75. SPI Timing Diagram
DO
CH[1]
t
LAST
CH
Rev. 0 | Page 34 of 52
t
CL
DO_12
R/W
LAST
Min
9.0
9.0
3.0
3.0
3.0
3.0
3.0
3.0
2
3
16
DO_2
ADDR[1]
LAST
DO_1
t
CSHD
ADDR[0]
LAST
Max
15.0
DO_0
t
LAST
CSSD
t
CSW
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK cycles
SCLK cycles
SCLK cycles