micrf507ymltr Micrel Semiconductor, micrf507ymltr Datasheet - Page 17

• Manufacturer Part Number: micrf507ymltr
• Description: 470mhz To 510mhz Low-power Fsk Transceiver With +10dbm Power Amplifier
• Manufacturer: Micrel Semiconductor

An external reference clock, when used instead of a
crystal, should be applied to pin 24 (XTALOUT) with pin
23 (XTALIN) not connected. To maintain proper DC
biasing within the chip, use AC-coupling between the
external reference and the XTALOUT-pin.
BITSYNC_CLK (Receiver Bit Synchronization Clock)
The
f
frequency f
Refclk_K and BitSync_clkS:
The bit synchronizer uses a clock that needs to be
programmed to 16 times the actual bit rate. As an
example, a bit rate of 20kbps needs a bit synchronizer
clock with frequency of 320kHz. Refer to Figure 9 and
“Data Interface and Bit Synchronization” section for more
details.
BITRATE_CLK (Transmitter Bit Rate Clock)
The frequency f
of the crystal oscillator frequency f
the register fields Refclk_K and BitRate_clkS:
In transmit mode, when Sync_en = 1, BITRATE_CLK
appears on the DATACLK pin. Its frequency is equal to
the bit rate. Example; a bit rate of 20 kbit/sec requires an
f
Interface and Bit Synchronization” subsection for more
details.
MODULATOR_CLK (VCO Modulator Clock)
The frequency f
function of the crystal oscillator frequency f
values of the register fields Refclk_K and Mod_clkS:
March 2010
BITSYNC_CLK
BITRATE_CLK
Micrel, Inc.
frequency
f
BITRATE_CL
f
MOD_CLK
f
BITSYNC_CL
,
of 20kHz. Refer to Figure 9 and the “Data
XCO
is a function of the crystal oscillator
BITRATE_CLK
=
and the values of the register fields
MOD_CLK
K
Refclk_K
K
of
=
=
Refclk_K
Refclk_K
the
of BITRATE_CLK is a function
of MODULATOR_CLK is a
f
×
XCO
bit
2
- (7
×
f
Mod_clkS
XCO
f
synchronization
2
×
XCO
- (7
XCO
2
BitSync_cl
(7
-
and the values of
BitRate_cl
)
kS
XCO
)
kS)
and the
clock
17
The modulator clock is used if VCO modulation method
is selected. Set the modulator clock frequency to either
8x or 16x the bit rate. See “VCO Modulation and the
Modulator” subsection for more information.
Data Interface and Bit Synchronization
Transmitted and received data bits are coupled to the
MICRF507 serially through the Data Interface. This Data
Interface consists of the DATAIXO and DATACLK pins.
This is a separate interface from the Control Interface
(CS, IO, and SCLK), for which see Control (3-wire)
Interface.
Figure 9 shows the data interface circuitry aboard the
MICRF507. DATAIXO is an input during transmission,
whereas during reception a driver is enabled and it
becomes an output. DATACLK is always an output.
A rule that applies when using VCO modulation is: after
commanding the MICRF507 to enter transmit mode, the
microcontroller shall tri-state the driver connected to
DATAIXO
microcontroller
Transitions” section for more details.
The data interface can be programmed for synchronous
and non-synchronous operation according to the setting
of the Sync_en bit; see Table 7.
Table 5. Generation of Bitrate_clk, BitSync_clk
(*) Can not be used as BitRate_clk.
BitRate_clkS[2:0]
BitSync_clkS[2:0]
Mod_clkS[2:0]
000
001
010
011
100
101
110
111
to
leave
begins
and Mod_clk
that
sending
Corresponding Clock
Frequency
(f
f
f
f
f
f
f
f
f
XCO
XCO
XCO
XCO
XCO
XCO
XCO
XCO
XCO
/(128xRefClk_K)
/(64xRefClk_K)
/(32xRefClk_K)
/(16xRefClk_K)
/(8xRefClk_K)
/(4xRefClk_K)
/(2xRefClk_K) (*)
pin
/RefClk_K (*)
is crystal frequency)
data.
floating
M9999-032210-B
See
MICRF507
until
“Mode
the