micrf507ymltr Micrel Semiconductor, micrf507ymltr Datasheet - Page 10

• Manufacturer Part Number: micrf507ymltr
• Description: 470mhz To 510mhz Low-power Fsk Transceiver With +10dbm Power Amplifier
• Manufacturer: Micrel Semiconductor

Functional Description
Control (3-wire) Interface
General
The MICRF507 operation is controlled through a set of 8-
bit registers. The chip has a total of 23 readable registers
(addresses 0-22) of which 22 (addresses 0-21) are
writeable. Through this register set, the user can set the
MICRF507 in transmit or receive mode, program the
carrier frequency, and select a bit rate, among other
options.
Table 1 identifies all register bits. Table 26 gives more
detail and Table 27 shows the register fields grouped by
category, with don’t-care and mandatory bits omitted.
Some bits shown as ‘0’ or ‘1’ are mandatory bits and must
always be written with the values given. Other bits marked
as “-“ are “don’t care” bits.
Registers are accessed serially through the control
interface consisting of the CS, IO, and SCLK pins.
Positive-going pulses at SCLK serve to clock bits in and
out of IO at a rate determined by the user. When IO is an
input, falling edges of SCLK strobe each bit in; when IO is
an output, each bit appears at IO after the rising edge of
SCLK.
March 2010
Micrel, Inc.
10
The IO is an input for entry of starting addresses, the R/W
bit, and bytes being written to registers, and an output for
bytes read from registers.
CS enables transactions at the control interface, active
high. Transitions at the other two pins are ignored when
CS is low. This allows the MICRF507 to share SCLK and
IO with other devices as long as they have separate CS
lines.
To start a transaction (with SCLK and CS initially low),
bring CS high. To end a transaction (with SCLK low), bring
CS low.
To write a bit into IO (when IO is an input); first bring SCLK
high and drive IO with the bit level to be input (in either
order, or simultaneously). Then bring SCLK low.
To read a bit out of IO (when IO is an output); first bring
SCLK high and read the level on IO. Then bring SCLK low
(in either order, or simultaneously).
The first byte to be clocked in during a transaction is made
of seven bits (MSB first) of register address followed by
the R/W bit, 0 for write, 1 for read. Then, one or more
bytes to be written to or read from registers are clocked in
or out respectively, always MSB first.
M9999-032210-B
MICRF507