hy27ug164g2m Hynix Semiconductor, hy27ug164g2m Datasheet - Page 10

no-image

hy27ug164g2m

Manufacturer Part Number
hy27ug164g2m
Description
4gbit 512mx8bit / 256mx16bit Nand Flash
Manufacturer
Hynix Semiconductor
Datasheet
Rev 0.7 / Feb. 2006
NOTE:
1. L must be set to Low.
NOTE:
READ 1
READ FOR COPY-BACK
READ ID
RESET
PAGE PROGRAM (start)
COPY BACK PGM (start)
CACHE PROGRAM
BLOCK ERASE
READ STATUS REGISTER
RANDOM DATA INPUT
RANDOM DATA OUTPUT
CACHE READ START
CACHE READ EXIT
LOCK BLOCK
LOCK TIGHT
UNLOCK (start area)
UNLOCK (end area)
READ LOCK STATUS
1. L must be set to Low
2nd Cycle
2nd Cycle
3rd Cycle
4th Cycle
5th Cycle
3rd Cycle
4th Cycle
5th Cycle
1st Cycle
1st Cycle
FUNCTION
IO0
IO0
A12
A20
A28
A12
A20
A28
A0
A8
A0
A8
Table 3: Address Cycle Map(x16)
Table 3: Address Cycle Map(x8)
1st CYCLE
IO1
IO1
A13
A21
A29
A13
A21
L
A1
A9
A1
A9
2Ah
2Ch
7Ah
00h
00h
90h
FFh
80h
85h
80h
60h
70h
85h
05h
00h
34h
23h
24h
(1)
Table 4: Command Set
4Gbit (512Mx8bit / 256Mx16bit) NAND Flash
IO2
IO2
A10
A14
A22
A10
A14
A22
L
L
A2
A2
(1)
(1)
2nd CYCLE
D0h
30h
35h
10h
10h
15h
E0h
31h
-
-
-
-
-
-
-
-
-
-
IO3
IO3
A11
A15
A23
A11
A15
A23
L
L
A3
A3
(1)
(1)
HY27UG(08/16)4G(2/D)M Series
3rd CYCLE
IO4
IO4
A16
A24
A16
A24
L
L
L
L
A4
A4
(1)
(1)
(1)
(1)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
IO5
IO5
A17
A25
A17
A25
L
L
L
L
A5
A5
(1)
(1)
(1)
(1)
Acceptable command
during busy
IO6
IO6
A18
A26
A18
A26
L
L
L
L
A6
A6
(1)
(1)
(1)
(1)
Yes
Yes
IO7
IO7
A19
A27
A19
A27
L
L
L
L
A7
A7
(1)
(1)
(1)
(1)
10

Related parts for hy27ug164g2m