la-ispmach4032v Lattice Semiconductor Corp., la-ispmach4032v Datasheet - Page 23

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la-ispmach4032v

Manufacturer Part Number
la-ispmach4032v
Description
3.3v/1.8v In-system Programmable Superfast High Density Plds Tm
Manufacturer
Lattice Semiconductor Corp.
Datasheet
Lattice Semiconductor
LA-ispMACH 4000V/Z Timing Adders
Optional Delay Adders
t
t
t
t
t
LVTTL_in
LVCMOS33_in
LVCMOS25_in
LVCMOS18_in
PCI_in
t
LVTTL_out
LVCMOS33_out t
LVCMOS25_out t
LVCMOS18_out t
PCI_out
Slow Slew
Note: Open drain timing is the same as corresponding LVCMOS timing.
1. Refer to Technical Note TN1004: ispMACH 4000 Timing Model Design and Usage Guidelines for information regarding use of these adders.
INDIO
EXP
ORP
BLA
IOI
IOO
Adder Type
Input Adjusters
Output Adjusters
t
t
t
t
t
t
t
t
t
t
t
INREG
MCELL
ROUTE
IN
IN
IN
IN
IN
BUF
BUF
BUF
BUF
BUF
BUF
Base Parameter
, t
, t
, t
, t
, t
, t
, t
, t
, t
, t
, t
GCLK_IN
GCLK_IN
GCLK_IN
GCLK_IN
GCLK_IN
EN
EN
EN
EN
EN
EN
, t
, t
, t
, t
, t
DIS
DIS
DIS
DIS
DIS
, t
, t
, t
, t
, t
GOE
GOE
GOE
GOE
GOE
Input register delay
Product term expander delay
Output routing pool delay
Additional block loading adder
Using LVTTL standard
Using LVCMOS 3.3 standard
Using LVCMOS 2.5 standard
Using LVCMOS 1.8 standard
Using PCI compatible input
Output configured as TTL buffer
Output configured as 3.3V buffer
Output configured as 2.5V buffer
Output configured as 1.8V buffer
Output configured as PCI
compatible buffer
Output configured for slow slew
rate
Description
LA-ispMACH 4000V/Z Automotive Family Data Sheet
1
23
LA-ispMACH 4000V
Min.
-75
Max.
1.00
0.33
0.05
0.05
0.60
0.60
0.60
0.00
0.60
0.20
0.20
0.10
0.00
0.20
1.00
LA-ispMACH 4000Z
Min.
-75
Max.
1.30
0.50
0.40
0.05
0.60
0.60
0.60
0.00
0.60
0.20
0.20
0.10
0.00
0.20
1.00
Timing v.3.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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