m52s64322a Elite Semiconductor Memory Technology Inc., m52s64322a Datasheet - Page 22
m52s64322a
Manufacturer Part Number
m52s64322a
Description
512k X 32 Bit X 4 Banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
1.M52S64322A.pdf
(47 pages)
- Current page: 22 of 47
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ESMT
6. Precharge
.
7. Auto Precharge
*Note:
Elite Semiconductor Memory Technology Inc.
C M D
C L K
D Q
C M D
C L K
D Q
1. t
2. Number of valid output data after row precharge: 1, 2 for CAS Latency = 2, 3 respectively.
3. The row active command of the precharge bank can be issued after t
1 ) N o r m a l W r i t e ( B L = 4 )
The new read/write command of other activated bank can be issued from this point.
At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.
1 ) N o r m a l W r i t e ( B L = 4 )
RDL
: Last data in to row precharge delay.
W R
D 0
W R
D 0
D 1
D 1
D 2
D 2
D 3
A u t o P r e c h a r g e s t a r t s
D 3
t
* N o t e 1
R D L
t
R D L ( m i n )
P R E
* N o t e 3
D Q ( C L 3 )
D Q ( C L 2 )
D Q ( C L 3 )
D Q ( C L 2 )
C M D
C M D
C M D
C L K
C L K
2 ) N o r m a l R e a d ( B L = 4 )
2 ) N o r m a l R e a d ( B L = 4 )
R D
R D
RP
from this point.
Publication Date: Aug. 2009
Q 0
D 0
Revision: 1.3
A u t o P r e c h a r g e s t a r t s
Q 0
Q 1
D 1
D 0
M52S64322A
P R E
P R E C L = 3
Q2
Q 1
D 2
D 1
* N o t e 3
C L = 2
Q 3
Q2
D 3
D 2
* N o t e 2
* N o t e 2
22/47
Q3
D 3
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