74LVC2G14GW,125 NXP Semiconductors, 74LVC2G14GW,125 Datasheet - Page 16

IC SCHMITT-TRIG SGL INV SC88-6

74LVC2G14GW,125

Manufacturer Part Number
74LVC2G14GW,125
Description
IC SCHMITT-TRIG SGL INV SC88-6
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC2G14GW,125

Number Of Circuits
2
Logic Type
Inverter with Schmitt Trigger
Package / Case
SC-70-6, SC-88, SOT-363
Number Of Inputs
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V, 5 V
Logical Function
Inverter Schmit Trig
Number Of Elements
2
Input Type
Schmitt Trigger
Propagation Delay Time
12ns
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Package Type
SOT-363
Operating Temp Range
-40C to 125C
Pin Count
6
Quiescent Current
40uA
Output Type
Schmitt Trigger
Technology
CMOS
Mounting
Surface Mount
Operating Temperature Classification
Automotive
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.65V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4840-2
74LVC2G14GW,125
74LVC2G14GW-G
74LVC2G14GW-G
935273895125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC2G14GW,125
Manufacturer:
NXP Semiconductors
Quantity:
2 350
NXP Semiconductors
Fig 19. Package outline SOT1202 (XSON6)
74LVC2G14
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1202
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
terminal 1
index area
1.05
1.00
0.95
e
D
(6×)
L
(2)
1.05
1.00
0.95
1
E
0.55 0.35
JEDEC
e
1
6
All information provided in this document is subject to legal disclaimers.
e
e
1
1
References
D
2
5
Rev. 5 — 29 October 2010
0.35
0.30
0.27
0
L
e
1
0.40
0.35
0.32
L
1
b
3
4
JEITA
scale
0.5
Dual inverting Schmitt trigger with 5 V tolerant input
A
E
L
1
A
1 mm
(4×)
(2)
European
projection
74LVC2G14
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-06
sot1202_po
SOT1202
16 of 20

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