wm8352 Wolfson Microelectronics plc, wm8352 Datasheet - Page 178

• Manufacturer Part Number: wm8352
• Description: Wolfson Audioplus? Stereo Codec With Power Management
• Manufacturer: Wolfson Microelectronics plc

WM8352
19.7 AUXADC INTERRUPTS
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The AUXADC has five second-level interrupts which can trigger a first-level System Interrupt,
AUXADC_INT (see Section 24). These are described in Table 119. Each AUXADC interrupt in
Register R26 can be masked by setting the associated mask bit in Register R34.
The AUX_DATARDY_EINT interrupt indicates that new AUXADC data is ready. This bit is cleared
when Register R26 is read. Note that this bit is not cleared by reading the measured AUXADC data
in Registers R152 to R159.
The AUXADC_DCOMPn_EINT interrupts indicate that the selected AUXADC channel on Comparator
‘n’ is beyond the programmed threshold. The DCMPn_GT register bits defined in Table 118 select
whether an interrupt indicates the measured value is above the threshold or indicates the measured
value is below the threshold.
R26 (1Ah)
Interrupt
Status 2
R34 (22h)
Interrupt
Status 2 Mask
Table 119 AUXADC Interrupts
ADDRESS
BIT
8:4
8
7
6
5
4
AUXADC_DATARDY_EINT
AUXADC_DCOMP4_EINT
AUXADC_DCOMP3_EINT
AUXADC_DCOMP2_EINT
AUXADC_DCOMP1_EINT
“IM_” + name of respective
bit in R26
LABEL
Auxiliary data ready.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP4 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP3 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP2 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
DCOMP1 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
DESCRIPTION
PD, June 2009, Rev 4.1
Production Data
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