wm9712l Wolfson Microelectronics plc, wm9712l Datasheet

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wm9712l

Manufacturer Part Number
wm9712l
Description
Ac?97 Audio And Touchpanel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet

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DESCRIPTION
The WM9712L is a highly integrated input / output device
designed for mobile computing and communications. The
device can connect directly to a 4-wire or 5-wire touchpanel,
mono or stereo microphones, stereo headphones and a
mono speaker, reducing total component count in the
system. Additionally, phone input and output pins are
provided
communication devices.
The WM9712L also offers up to four auxiliary ADC inputs
for analogue measurements such as temperature or light,
and five GPIO pins for interfacing to buttons or other digital
devices. To monitor the battery voltage in portable systems,
the WM9712L has two uncommitted comparator inputs.
All device functions are accessed and controlled through a
single AC-Link interface compliant with the AC’97 standard.
Additionally, the WM9712L can generate interrupts to
indicate pen down, pen up, availability of touchpanel data,
low battery, dead battery, and GPIO conditions.
The WM9712L operates at supply voltages from 1.8 to 3.6
Volts. Each section of the chip can be powered down under
software control to save power. The device is available in a
small leadless 7x7mm QFN package, ideal for use in hand-
held portable systems.
BLOCK DIAGRAM
WOLFSON MICROELECTRONICS plc
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FEATURES
• AC’97 Rev 2.2 compatible stereo codec
• On-chip 45mW headphone driver
• On-chip 400mW mono speaker driver
• Stereo, mono or differential microphone input
• Auxiliary mono DAC (ring tone or DC level generation)
• Seamless interface to wireless chipset
• Resistive touchpanel interface
• Up to 5 GPIO pins
• 2 comparator inputs for battery monitoring
• Up to 4 auxiliary ADC inputs
• 1.8V to 3.6V supplies
• 7x7mm QFN
APPLICATIONS
• Personal Digital Assistants (PDA)
• Smartphones
• Handheld and Tablet Computers
- DAC SNR 94dB, THD –87dB
- ADC SNR 92dB, THD –87dB
- Variable Rate Audio, supports all WinCE sample rates
- Tone Control, Bass Boost and 3D Enhancement
- Automatic Level Control (ALC)
- Supports 4-wire and 5-wire panels
- 12-bit resolution, INL ±2 LSBs (<0.5 pixels)
- X, Y and touch-pressure (Z) measurement
- Pen-down detection supported in Sleep Mode
Copyright ©2006 Wolfson Microelectronics plc.
Production Data, August 2006, Rev 4.5
WM9712L

Related parts for wm9712l

wm9712l Summary of contents

Page 1

... AC’97 Audio and Touchpanel CODEC DESCRIPTION The WM9712L is a highly integrated input / output device designed for mobile computing and communications. The device can connect directly to a 4-wire or 5-wire touchpanel, mono or stereo microphones, stereo headphones and a mono speaker, reducing total component count in the system ...

Page 2

... WM9712L DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................4 ORDERING INFORMATION ..................................................................................4 PIN DESCRIPTION ................................................................................................5 ABSOLUTE MAXIMUM RATINGS.........................................................................6 RECOMMENDED OPERATING CONDITIONS .....................................................6 ELECTRICAL CHARACTERISTICS ......................................................................7 AUDIO OUTPUTS.......................................................................................................... 7 AUDIO INPUTS.............................................................................................................. 8 AUXILIARY MONO DAC (AUXDAC).............................................................................. 8 TOUCHPANEL AND AUXILIARY ADC .......................................................................... 9 COMPARATORS ........................................................................................................... 9 REFERENCE VOLTAGES ........................................................................................... 10 DIGITAL INTERFACE CHARACTERISTICS................................................................ 10 HEADPHONE / SPEAKER OUTPUT THD VERSUS POWER ..................................... 11 POWER CONSUMPTION ...

Page 3

... RECOMMENDED COMPONENTS VALUES ............................................................... 72 LINE OUTPUT ............................................................................................................. 72 AC-COUPLED HEADPHONE OUTPUT....................................................................... 73 DC COUPLED (CAPLESS) HEADPHONE OUTPUT ................................................... 73 BTL LOUDSPEAKER OUTPUT ................................................................................... 74 COMBINED HEADSET / BTL EAR SPEAKER............................................................. 74 COMBINED HEADSET / SINGLE-ENDED EAR SPEAKER......................................... 74 JACK INSERT DETECTION ........................................................................................ 75 HOOKSWITCH DETECTION....................................................................................... 75 PACKAGE DRAWING..........................................................................................76 IMPORTANT NOTICE ..........................................................................................77 ADDRESS:................................................................................................................... 77 w WM9712L PD Rev 4.5 August 2006 3 ...

Page 4

... BITCLK 6 QFN DGND2 7 SDATAIN 8 DCVDD 9 SYNC 10 RESETB 11 WIPER / AUX4 ORDERING INFORMATION DEVICE TEMP. RANGE WM9712LGEFL/V -25 to +85 WM9712LGEFL/RV -25 to +85 Note: Reel quantity = 2,200 ROUT2 35 LOUT2 34 SPKGND 33 MONOOUT 32 CAP2 31 BMON / AUX3 30 COMP2 / AUX2 29 COMP1 / AUX1 28 MICBIAS ...

Page 5

... Digital Output Clock Crystal Connection 2 Supply Digital Ground (return path for both DCVDD and DBVDD) Digital Input Serial Data Output from Controller / Input to WM9712L Digital Output Serial Interface Clock Output to Controller Digital Ground (return path for both DCVDD and DBVDD) Supply ...

Page 6

... WM9712L ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process therefore generically susceptible to damage from excessive static voltages ...

Page 7

... L P =20mW, R =32Ω SNR o C, 1kHz signal 48kHz, 18-bit audio data unless MIN TYP MAX -87 -80 50 400 500 -66 0.05 90 100 -76 -73 -75 -70 - =16Ω, THD Rev 4.5 August 2006 WM9712L UNIT V rms ...

Page 8

... WM9712L AUDIO INPUTS Test Conditions DBVDD=3.3V, DCVDD = 3.3V, AVDD = 3.3V, T PARAMETER LINEINL/R, MICL/R and PHONE pins Full Scale Input Signal Level (for ADC 0dB Input at 0dB Gain) Input Resistance Input Capacitance Line input to ADC (LINEINL, LINEINR, PHONE) Signal to Noise Ratio (A-weighted) Total Harmonic Distortion ...

Page 9

... R RPU = 000001 PU I PIL = 1 P PIL = 0 AVDD = 3.3V AVDD = 1.8V during measurement average over time SYMBOL TEST CONDITIONS pin not selected as AUX ADC input 24.576MHz crystal WM9712L MIN TYP MAX AGND AVDD <10 12 ±0.25 ±1 ±2 ±4 ± 20.8 12 ...

Page 10

... WM9712L REFERENCE VOLTAGES Test Conditions DBVDD=3.3V, DCVDD = 3.3V, AVDD = 3.3V, T PARAMETER Audio ADCs, DACs, Mixers Reference Input/Output Buffered Reference Output Microphone Bias Bias Voltage Bias Current Source Output Noise Voltage DIGITAL INTERFACE CHARACTERISTICS Test Conditions DBVDD = 3.3V, DCVDD = 3.3V PARAMETER Digital Logic Levels (all digital input or output pins) – CMOS Levels ...

Page 11

... Production Data HEADPHONE / SPEAKER OUTPUT THD VERSUS POWER -20 Headphone Power vs THD+N (32Ohm load) -40 -60 -80 -100 Power (mW) -20 Headphone Power vs THD+N (16Ohm load) -40 -60 -80 -100 Power (mW WM9712L PD Rev 4.5 August 2006 11 ...

Page 12

... Supply voltages: Reducing the supply voltages also reduces digital supply currents, and therefore results in significant power savings especially in the digital sections of the WM9712L. • Operating mode: Significant power savings can be achieved by always disabling parts of the WM9712L that are not used (e.g. audio ADC, DAC, touchpanel digitiser). Mode Description ...

Page 13

... Production Data DEVICE DESCRIPTION INTRODUCTION The WM9712L is designed to meet the mixed-signal requirements of portable and wireless computer systems. It includes audio recording and playback, touchpanel digitisation, battery monitoring, auxiliary ADC and GPIO functions, all controlled through a single 5-wire AC-Link interface. SOFTWARE SUPPORT The basic audio features of the WM9712L are software compatible with standard AC’97 device drivers ...

Page 14

... WM9712L AUDIO PATHS OVERVIEW 20h:7 (Loopback) L Slot 3 ADC Left 1 Tone and 3D Left Channel 08h / 22h / 18 Bit DAC AC Link 0 20h:13 (3DE) 10h:12-8 00000 = +12dB 11111 = -34.5dB LINEINL to SPKR MIXER LINEL PGA Pin 23 PCBEEP Pin 19 0Ch:0-4 00000 = +12dB 11111 = -34.5dB PHONE PHONE PGA ...

Page 15

... LINEINR input gain VOL (0dB) similar to LINEINLVOL 15 L2H 1 Mute LINEIN path to headphone mixer 1: Mute mute (ON) 14 L2S 1 Mute LINEIN path to speaker mixer 1: Mute mute (ON) 13 L2P 1 Mute LINEIN path to phone mixer 1: Mute mute (ON) WM9712L DESCRIPTION PD Rev 4.5 August 2006 15 ...

Page 16

... WM9712L It is also possible to use the LINEINL and LINEINR pins as a second differential microphone input. This is achieved by setting the DS bit (register 5Ch, bit 11) to ‘1’. This disables the line-in audio paths and routes the signal from LINEINL and LINEINR through the differential mic path came from the MIC1 and MIC2 pins ...

Page 17

... BIT LABEL DEFAULT 15 P2H 1 Mute PHONE path to headphone mixer 1: Mute mute (ON) 14 P2S 1 Mute PHONE path to speaker mixer 1: Mute mute (ON) 4:0 PHONE 01000 PHONE input gain VOL (0dB) 00000: +12dB … (1.5dB steps) 11111: -34.5dB WM9712L DESCRIPTION PD Rev 4.5 August 2006 17 ...

Page 18

... WM9712L PCBEEP INPUT Pin 19 (PCBEEP mono, line level input intended for externally generated signal or warning tones routed directly to the record selector and all three output mixers, without an input amplifier. The signal gain into each mixer can be independently controlled, with a separate mute bit for each signal path ...

Page 19

... ADC data appears on both the left and right AC-Link slots. HIGH PASS FILTER The WM9712L audio ADC incorporates a digital high-pass filter that eliminates any DC bias from the ADC output data. The filter is enabled by default. For DC measurements, it can be disabled by writing a ‘ ...

Page 20

... WM9712L RECORD SELECTOR The record selector determines which input signals are routed into the audio ADC. The left and right channels can be selected independently. This is useful for recording a phone call: one channel can be used for the RX signal and the other for the TX signal, so that both sides of the conversation are digitized ...

Page 21

... Record Gain changes immediately 1: Record Gain changes when signal is zero or after time-out 6 GRR 0 Gain range select (right) Similar to GRL 5:0 RECVOLR 000000 Record Volume (right) Similar to RECVOLL WM9712L DESCRIPTION Extended (GRL=1) 000000: -17.25dB 000001: -16.5dB … (0.75dB steps) 111111: +30dB PD Rev 4.5 August 2006 21 ...

Page 22

... WM9712L AUTOMATIC LEVEL CONTROL The WM9712L has an automatic level control that aims to keep a constant recording volume irrespective of the input signal level. This is achieved by continuously adjusting the PGA gain so that the signal level at the ADC input remains constant. A digital peak detector monitors the ADC output and changes the PGA gain if necessary ...

Page 23

... ATK 0010 ALC attack (gain ramp-down) time (24ms) 0000 = 6ms 0001 = 12ms 0010 = 24ms … (time doubles with every step) 1010 or higher = 6.14s WM9712L DESCRIPTION 17 x MCLK period 16 x MCLK period 15 x MCLK period 14 x MCLK period PD Rev 4.5 August 2006 ...

Page 24

... When the signal is very quiet and consists mainly of noise, the ALC function may cause “noise pumping”, i.e. loud hissing noise during silence periods. The WM9712L has a noise gate function that prevents noise pumping by comparing the signal level at the input pins (i.e. before the record PGA) against a noise gate threshold, NGTH ...

Page 25

... DAC. (Contrary to the AC’97 specification, they have no effect on analogue input signals or signals played through the auxiliary DAC. Nevertheless, the ID2 and ID5 bits in the reset register, 00h, are set to ‘1’ to indicate that the WM9712L supports tone control and bass boost.) The DAC output has a PGA for volume control. The DAC sample rate can be controlled by writing to a control register (see “ ...

Page 26

... WM9712L TONE CONTROL / BASS BOOST The WM9712L provides separate controls for bass and treble with programmable gains and filter characteristics. This function operates on digital audio data before it is passed to the audio DACs. Bass control can take two different forms: • Linear bass control: bass signals are amplified or attenuated by a user programmable gain ...

Page 27

... DEFAULT 13 3DE 0 (disabled) 5 3DLC 0 4 3DUC 0 3:0 3DDEPTH 0000 WM9712L DESCRIPTION 3D enhancement enable Lower Cut-off Frequency 0 = Low (200Hz at 48kHz sampling High (500Hz at 48kHz sampling) Upper Cut-off Frequency 0 = High (2.2kHz at 48kHz sampling Low (1.5kHz at 48kHz sampling) 3D Depth 0000: 0% (minimum 3D effect) 0001: 6.67% … 1110: 93.3% 1111: 100% (maximum) PD Rev 4 ...

Page 28

... WM9712L AUXILIARY DAC AUXDAC is a simple 12-bit mono DAC. It can be used to generate DC signals (with the numeric input written into a control register signals such as telephone-quality ring tones or system beeps (with the input signal supplied through an AC-Link slot mode (XSLE = 1), the input data is binary offset coded ...

Page 29

... MUTE 1 13:8 HPOUTLVOL 000000 (0dB 5:0 HPOUTRVOL 00000 (0dB) WM9712L DESCRIPTION Mute HPOUTL and HPOUTR 1: Mute (OFF Mute (ON) HPOUTL Volume 000000: 0dB (maximum) 000001: -1.5dB … (1.5dB steps) 011111: -46.5dB 1xxxxx: -46.5dB Zero Cross Enable 0: Change gain immediately 1: Change gain only on zero crossings, ...

Page 30

... WM9712L EAR SPEAKER OUTPUT – OUT3 Pin 37 (OUT3) has a buffer that can drive load impedances down to 16Ω. It can be used to: • Drive an ear speaker (phone receiver). The speaker can be connected differentially between OUT3 and HPOUTL single-ended configuration (OUT3 to HPGND). The ear speaker output is produced by the headphone mixer ...

Page 31

... INV 0 LOUT2 Invert Inversion (0° phase shift Signal inverted (180° phase shift) 5:0 ROUT2VOL 00000 ROUT2 Volume (0dB) Similar to LOUT2VOL 8 SRC 0 Source of LOUT2/ROUT2 signals 0: speaker mixer (for BTL speaker) 1: headphone mixer (for stereo output) WM9712L DESCRIPTION PD Rev 4.5 August 2006 31 ...

Page 32

... If the chip temperature reaches approximately 150°C, and the ENT bit is set, the WM9712L deasserts GPIO bit 11 in register 54h, a virtual GPIO that can be set up to generate an interrupt to the CPU (see “GPIO and Interrupt Control” section). ...

Page 33

... Information” section for a circuit diagram). When the jack is inserted GPIO1 is pulled low by a switch on the socket. When the jack is removed GPIO1 is pulled high by a resistor. If the JIEN bit is set, the WM9712L automatically switches between headphone and ear speaker, as shown below. ...

Page 34

... WM9712L DIGITAL AUDIO (SPDIF) OUTPUT The WM9712L supports the SPDIF standard using pin 47 as its output. Note that pin 47 can also be used as a GPIO pin. The GE5 bit (register 56h, bit 5) selects between GPIO and SPDIF functionality (see “GPIO and Interrupt control” section). ...

Page 35

... AUDIO MIXERS MIXER OVERVIEW The WM9712L has three separate low-power audio mixers to cover all audio functions required by smartphones, PDAs and handheld computers. The diagram below shows the routing of the analogue audio signals into the mixers. The numbers at the mixer inputs refer to the control register bits that control the volume and muting for that particular signal ...

Page 36

... WM9712L SPEAKER MIXER The speaker mixer drives the LOUT2 and ROUT2 output. The following signals can be mixed into the speaker path: • PHONE (controlled by register 0Ch, see “Audio Inputs”) • LINE_IN (controlled by register 10h, see “Audio Inputs”) • the stereo DAC signal (controlled by register 18h, see “Audio DACs”) • ...

Page 37

... Production Data VARIABLE RATE AUDIO / SAMPLE RATE CONVERSION By using an AC’97 Rev2.2 compliant audio interface, the WM9712L can record and playback at all commonly used audio sample rates, and offer full split-rate support (i.e. the DAC, ADC and AUXDAC sample rates are completely independent of each other – any combination is possible). ...

Page 38

... WM9712L TOUCHPANEL INTERFACE The WM9712L includes a touchpanel driver and digitiser circuit for use with 4-wire or 5-wire resistive touchpanels. The following functions are implemented: • X co-ordinate measurement • Y co-ordinate measurement • Pen down detection, with programmable sensitivity • Touch pressure measurement (4-wire touchpanel only) • ...

Page 39

... TPVDD Y+ (15 (14) Y- zero power comparator Y- (17) TPGND X- (16) WM9712 that controls pen-down sensitivity. Increasing WM9712L / ( TPVDD TPGND TPVDD WM9712 TPGND / ( PEN DOWN makes the PU makes it more sensitive. PD Rev 4.5 August 2006 ...

Page 40

... PENDOWN), if the pin is not used for GPIO (GE3=0). Additionally, PENDOWN is passed to the GPIO logic block (register 54h, bit 13), where it can generate CPU interrupts, and / or to wake up the WM9712L from sleep mode (see “GPIO and Interrupt Control” section). ...

Page 41

... REF+ VM WIPER (12) ADC V REF- TR (15) WM9712 TPVDD V = proportional to Y position M BR (14) TPGND BL (17) TPGND TL (16) TPVDD R PU VDD WIPER (12) PEN DOWN zero power comparator TR (15) TPGND WM9712 BR (14) TPGND BL (17) TPGND TL (16) TPGND WM9712L . PU PD Rev 4.5 August 2006 41 ...

Page 42

... RPR 0 Wake-up on pen-down mode 0: Wake-up the AC-Link only (hold SDATAIN high until controller sends warm reset or cold reset) 1: Wake-up the WM9712L without waiting for a reset signal from the controller Production Data DESCRIPTION /1 = TYP 64kΩ (most sensitive TYP 32kΩ ...

Page 43

... Table 27 Touchpanel Digitiser Control (Initiation of Measurements) In continuous mode (CTC = 1), the WM9712L autonomously initiates measurements at the rate set by CR, and supplies the measured data to the CPU on one of the unused AC’97 time slots. DMA- enabled CPUs can write the data directly into a FIFO without any intervention by the CPU core. This reduces CPU loading and speeds up the execution of user programs in handheld systems ...

Page 44

... SLT 78h Table 29 Touchpanel Digitiser Data To avoid losing data that has not yet been read, the WM9712L can delay overwriting register 7Ah with new data until the old data has been read. This function is enabled using the WAIT bit. w BIT ...

Page 45

... TOUCHPANEL SETTLING TIME For accurate touchpanel measurements, some settling time may be required between the switch matrix applying a voltage across the touchpanel plate and the ADC sampling the signal. This time delay function is built into the WM9712L and can be programmed as shown below. REGISTER ADDRESS ...

Page 46

... AUX inputs NOT intended for touchpanel digitisation. There are several side-effects when DEL is set to ‘1111’: • Co-ordinate mode does not work, i.e. the WM9712L behaves as if COO = 0, even if COO = 1 (see “Measurement Types”) • co-ordinate or touch pressure measurements are selected (ADCSEL = 001, 010 or 011), then the switch matrix is constantly on, and current constantly flows in the touchpanel ...

Page 47

... Production Data AUXILIARY ADC INPUTS The ADC used for touchpanel digitisation can also be used for auxiliary measurements, provided that it is enabled (register 78h, PRP = 11). The WM9712L has four pins that can be used as auxiliary ADC inputs: • COMP1 / AUX1 (pin 29) • COMP2 / AUX2 (pin 30) • ...

Page 48

... VOLTAGE AVDD, DCVDD, ... REGULATOR AUX1 COMP1 ALARM C R2 BATT AUX2/ COMP2 R3 [Hz (2π C × (R1 || (R2+R3))) Production Data WM9712L DEAD + BAT - GPIO / V INTERRUPT REF LOGIC - + LOW BAT GPIO2/ GPIO IRQ PINS < VREF × (R1+R2+R3) / (R2+R3) BATT < VREF × (R1+R2+R3 BATT gets close to the low battery threshold, spurious BATT ...

Page 49

... The comparator output signals are passed to the GPIO logic block (see “GPIO and Interrupt Control” section), where they can be used to send an interrupt to the CPU via the AC-Link or via the IRQ pin, and / or to wake up the WM9712L from sleep mode. COMP1/AUX1 (pin 29) corresponds to GPIO bit 15 and COMP2/AUX2 (pin30) to bit 14. ...

Page 50

... GPIO bit is not set, i.e. all register bits are as if COMP2 had never triggered. Note: If COMP2 triggers while the WM9712L is in sleep mode, and the delay is enabled, then the device starts the on-chip crystal oscillator in order to count the time delay. ...

Page 51

... Independently of the GPIO pins, the WM9712L also has five virtual GPIOs. These are signals from inside the WM9712L, which are treated as if they were GPIO input signals. From a software perspective, virtual GPIOs are the same as GPIO pins, but they cannot be set up as outputs, and are not tied to an actual pin ...

Page 52

... WM9712L GPIO BIT 6- Table 37 GPIO Bits and Pins w SLOT12 TYPE PIN NO. BIT 5 GPIO Pin 44 6 GPIO Pin 45 7 GPIO Pin 46 8 GPIO Pin 47 9 GPIO Pin 48 N/A Unused - 15 Virtual - GPIO [Thermal Cutout] 16 virtual - GPIO [ADA] 17 Virtual - GPIO ...

Page 53

... If the system CPU cannot execute such an interrupt routine, it may be preferable to switch internal signals (such as PENDOWN) directly onto the GPIO pins. However, in this case the interrupt signals cannot be made sticky, and more GPIO pins are tied up both on the WM9712L and on the CPU. w ...

Page 54

... WM9712L REGISTER ADDRESS 56h GPIO pins function select Table 39 Using GPIO Pins for Non-GPIO Functions REGISTER ADDRESS 58h Additional Functional Control Table 40 Additional Functionality for GPIO Pins w BIT LABEL DEFAULT 2 GE2 1 GPIO2 / IRQ output select 0: Pin 45 disconnected from GPIO logic set 4Ch, bit 2 to ‘0’ to output IRQ signal ...

Page 55

... Table 41 Powerdown and Status Register (Conforms to AC’97 Rev 2.2) As can be seen from the table above, most blocks are ‘ON’ by default. However, if pin 47 (GPIO4/ADA/MASK) is held high during reset, the WM9712L starts up with all blocks powered down by default, saving power. This is achieved by connecting a pull-up resistor (e.g. 100kΩ) from pin 47 to DBVDD ...

Page 56

... The touchpanel digitiser is OFF by default. SLEEP MODE Whenever the PR4 bit (reg. 26h) is set, the AC-Link interface is disabled, and the WM9712L is in sleep mode. There is in fact a very large number of different sleep modes, depending on the other control bits. For example, the low-power standby mode described below is a sleep mode desirable to use sleep modes whenever possible, as this will save power ...

Page 57

... Production Data LOW POWER STANDBY MODE If all the bits in registers 26h and 24h are set, then the WM9712L is in low-power standby mode and consumes very little current. A 1MΩ resistor string remains connected across AVDD to generate VREF. This is necessary if the on-chip analogue comparators are used (see “Battery Alarm and Battery Measurement” ...

Page 58

... WM9712L AC97 DATA AND CONTROL INTERFACE INTERFACE PROTOCOL The WM9712Lhas a single AC’97 interface for both data transfer and control. The AC-Link uses 5 wires: • SDATAIN (pin 8) carries data from the WM9712L to the controller • SDATAOUT (pin 5) carries data from the controller to the WM9712L • ...

Page 59

... DATA SETUP AND HOLD Figure 18 Data Setup and Hold (50pF External Load) Note: Setup and hold times for SDATAIN are with respect to the AC’97 controller, not the WM9712L. Setup to falling edge of BITCLK Hold from falling edge of BITCLK Output valid delay from rising edge of ...

Page 60

... Incoming signals (from the AC’97 controller to the WM9712L) SDATAOUT rise time SDATAOUT fall time SYNC rise time SYNC fall time Outgoing signals (from the WM9712L to the AC’97 controller) BITCLK rise time BITCLK fall time SDATAIN rise time SDATAIN fall time AC-LINK POWERDOWN ...

Page 61

... Figure 22 Warm Reset Timing SYNC active high pulse width SYNC inactive to BITCLK startup delay w t RST_LOW BITCLK PARAMETER SYMBOL PARAMETER SYMBOL t t RST2CLK MIN TYP t 1.0 RST_LOW t 162.8 RST2CLK MIN TYP 1.3 SYNC_HIGH t 162.4 RST2CLK PD Rev 4.5 August 2006 WM9712L MAX UNIT µs ns MAX UNIT µ ...

Page 62

... XSLE 66h- Vendor Reserved 74h 76h Digitiser Reg 1 POLL 78h Digitiser Reg 2 PRP 7Ah Digitiser Read Back PNDN 7Ch Vendor ID1 7Eh Vendor ID2 Table 45 WM9712L Register Map SE3 SE2 SE1 SE0 ID9 ID8 LOUT2 Volume HPOUTL Volume 0 ...

Page 63

... Indicates that the WM9712L has a headphone output Indicates that the WM9712L does not support simulated stereo Indicates that the WM9712L supports bass and treble control Indicates that the WM9712L does not support modem functions Indicates that the WM9712L does not have a dedicated microphone ADC DEFAULT 1 (mute) Mutes LOUT2 and ROUT2 ...

Page 64

... WM9712L Register 08h controls the bass and treble response of the left and right audio DAC (but not AUXDAC). REG BIT LABEL ADDR 08h 11:8 BASS 6 DAT 4 TC 3:0 TRBL Register 0Ah controls the analogue input pin PCBEEP. REG BIT LABEL ADDR ...

Page 65

... Enables 20dB gain boost for ADC to phone mixer path 000 (mic) Selects left ADC signal source 000 (mic) Selects right ADC signal source DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION PD Rev 4.5 August 2006 WM9712L REFER TO Auxiliary DAC REFER TO Audio Mixers, Side Tone Control REFER TO Analogue Audio Outputs REFER TO ...

Page 66

... RMU 14 GRL 13:8 RECVOLL GRR 5:0 RECVOLR Register 20h is a “general purpose” register as defined by the AC’97 specification. Only two bits are implemented in the WM9712L. REG BIT LABEL DEFAULT ADDR 20h 13 3DE 0 (OFF (OFF) Register 22h controls 3D stereo enhancement for the audio DACs. ...

Page 67

... PR1 0 ADC inverse of PR0 Note: PR6 to PR0 default pin 47 is held high during reset, otherwise they default to 0. Register 28h is a read-only register that indicates to the driver which advanced AC’97 features the WM9712L supports. REG BIT LABEL DEFAULT ADDR ...

Page 68

... DEFAULT 0 Validity bit; ‘0’ indicates frame valid, ‘1’ indicates frame not valid 0 Indicates that the WM9712L does not support double rate SPDIF output (read-only) 10 Indicates that the WM9712L only supports 48kHz sampling on the SPDIF output (read-only) 0 Generation level; programmed as required by user 0000000 Category code ...

Page 69

... GPIO and Interrupt Control REFER TO Audio DACs, Stereo DACs Battery Alarm Analogue Inputs, Microphone Input Power Management Digital Audio (SPDIF) Output Audio ADC Analogue Audio Outputs, Thermal Sensor Audio ADC, ADC Slot Mapping DESCRIPTION PD Rev 4.5 August 2006 WM9712L REFER TO Audio ADC, Automatic Level Control 69 ...

Page 70

... RPU 000001 (64kΩ) 7Ah 15 PNDN 0 (pen up) read 14:12 ADCSRC 000 (none) only 11:0 ADCD 000h Register 7Ch and 7Eh are read-only registers that indicate to the driver that the codec is a WM9712L. REG BIT LABEL DEFAULT ADDR 7Ch 15:8 F7:0 57h 7:0 S7:0 4Dh 7Eh 15:8 T7:0 4Ch ...

Page 71

... AGND GND Layout Notes C6, C9 C11 and C13 should be as close to the relative WM9712L connecting pin as possible. 2. AGND and DGND should be connected as close to the WM9712L as possible. 3. For added strength and heat dissipation recommended that the GND_PADDLE(Pin 49) is connected to AGND. ...

Page 72

... LOUT2 and ROUT2, can also be used as line outputs, if LOUT2 is not inverted for BTL operation (INV = 0). Recommended external components are shown below. WM9712L Figure 24 Recommended Circuit for Line Output The DC blocking capacitors and the load resistance together determine the lower cut-off frequency, fc. Assuming a 10 kΩ ...

Page 73

... Production Data AC-COUPLED HEADPHONE OUTPUT The circuit diagram below shows how to connect a stereo headphone to the WM9712L. WM9712L Figure 25 Simple Headphone Output Circuit Diagram The DC blocking capacitors C1 and C2 together with the load resistance determine the lower cut-off frequency, fc. Increasing the capacitance lowers fc, improving the bass response. Smaller capacitance values will diminish the bass response. For example, with a 16Ω ...

Page 74

... OUT3 disabled. When the headset is not plugged in, OUT3 is enabled (see “Jack Insertion and Auto-Switching”) COMBINED HEADSET / SINGLE-ENDED EAR SPEAKER Instead of a BTL ear speaker, a single-ended ear speaker can also be used, as shown below. WM9712L Figure 29 Combined Headset / Single-ended Ear Speaker (OUT3SRC = 01 ...

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... DBVDD HPOUTR HPOUTL 100kΩ GPIO HPOUTR WM9712L HPOUTL AGND MICL/MICR GPIO logic MICBIAS 680Ω − 2.2kΩ switch closes on insertion - HOOK MIC SWITCH 47Ω PHONE HEADSET PD Rev 4.5 August 2006 WM9712L ...

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... WM9712L PACKAGE DRAWING FL: 48 PIN QFN PLASTIC PACKAGE EXPOSED GROUND PADDLE BOTTOM VIEW (A3) SIDE VIEW C SEATING PLANE W (A3 Exposed lead Half etch tie bar Symbols Dimensions (mm) MIN NOM 0.80 0. 0.02 A1 0.20 REF A3 0.18 0.25 b 7.00 BSC D 5.00 5.15 D2 7.00 BSC E 5.00 5.15 E2 0.5 BSC e 0.213 G 0 ...

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... Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS: Wolfson Microelectronics plc 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w WM9712L PD Rev 4.5 August 2006 77 ...

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