wm8569seds-v Wolfson Microelectronics plc, wm8569seds-v Datasheet - Page 8
wm8569seds-v
Manufacturer Part Number
wm8569seds-v
Description
24-bit, 192khz Stereo Codec With Volume Control
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8569SEDS-V.pdf
(36 pages)
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WM8569
MASTER CLOCK TIMING
Figure 1 ADC and DAC Master Clock Timing Requirements
Table 1 Master Clock Timing Requirements
Figure 2 Audio Interface – Master Mode
w
DIGITAL AUDIO INTERFACE – MASTER MODE
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, T
ADCMCLK = 256fs unless otherwise stated.
PARAMETER
System Clock Timing Information
MCLK System clock pulse width
high
MCLK System clock pulse width
low
MCLK System clock cycle time
MCLK Duty cycle
MCLK
SYMBOL
t
t
t
MCLKH
MCLKL
MCLKY
t
MCLKL
t
MCLKY
TEST CONDITIONS
t
MCLKH
A
= +25
40:60
MIN
11
11
28
o
C, fs = 48kHz, DACMCLK and
TYP
PD Rev 4.0 June 2006
60:40
MAX
Production Data
UNIT
ns
ns
ns
8
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