wm8569seds-v Wolfson Microelectronics plc, wm8569seds-v Datasheet - Page 26

• Manufacturer Part Number: wm8569seds-v
• Description: 24-bit, 192khz Stereo Codec With Volume Control
• Manufacturer: Wolfson Microelectronics plc

WM8569
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POWERDOWN MODE AND ADC/DAC DISABLE
The ADC and DAC may be powered down individually by setting the ADCPD and DACPD disable
bits. Setting ADCPD will disable the ADC and select a low power mode. The ADC digital filters will be
reset and will reinitialise when ADCPD is unset. Setting DACPD will disable the DAC and select a low
power mode.
MASTER POWERDOWN
This control bit powers down the references for the whole chip. Therefore for complete powerdown,
both the ADC and DACs should be powered down first before setting this bit.
DAC MASTER MODE SELECT
Control bit DACMS selects between audio interface Master and Slave Modes. In Master mode,
DACLRC and DACBCLK are outputs and are generated by the WM8569. In Slave mode DACLRC
and DACBCLK are inputs to WM8569.
MASTER MODE DACLRC FREQUENCY SELECT
In Master mode the WM8569 generates DACLRC and DACBCLK. These clocks are derived from the
master clock and the ratio of DACMCLK to DACLRC is set by DACRATE.
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
Powerdown Control
Interface Control
Interface Control
Interface Control
0001010
0001010
0001010
0001010
BIT
BIT
BIT
BIT
8:6
0
1
4
5
PWRDNALL
DACRATE
DACMS
ADCPD
DACPD
LABEL
LABEL
LABEL
LABEL
[2:0]
DEFAULT
DEFAULT
DEFAULT
DEFAULT
010
0
0
0
0
Master Power Down Bit:
DAC Audio Interface Master/Slave
Mode Select:
Master Mode
MCLK:LRC Ratio Select:
ADC Disable:
DAC Disable
0: Not powered down
1: Powered down
0: Slave mode
1: Master mode
000: 128fs (DAC only)
001: 192fs (DAC only)
010: 256fs
011: 384fs
100: 512fs
101: 768fs
0: Active
1: Disable
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
PD Rev 4.0 June 2006
Production Data
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