wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 47

• Manufacturer Part Number: wm8594seft-v
• Description: 24-bit 192khz 2vrms Multi-channel Codec
• Manufacturer: Wolfson Microelectronics plc

Production Data
GLOBAL ENABLE CONTROL
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The WM8594 includes a number of enable and disable mechanisms to allow the device to be
powered on and off in a pop-free manner. A global enable control bit enables the ADC, DAC and
analogue paths. For full details of pop-free operation, see ‘Pop and Click Performance’ on page 45.
Table 33 Bias Control
Table 34 Global Enable Control
REGISTER
REGISTER
ADDRESS
ADDRESS
ENABLE
BIAS
R35
R12
0Ch
23h
BIT
BIT
7:6
0
0
1
2
3
4
5
GLOBAL_
POBCTRL
VMIDTOG
FAST_EN
SOFT_ST
BIAS_EN
SEL[1:0]
LABEL
BUFIO_
LABEL
VMID_
EN
EN
DEFAULT
DEFAULT
00
0
0
0
0
1
0
0
Bias Source for Output Amplifiers
0 = Output amplifiers use master bias
1 = Output amplifiers use fast bias
VMID Power Down Characteristic
0 = Slow ramp
1 = Fast ramp
Fast Bias Enable
0 = Fast bias disabled
1 = Fast bias enabled
VMID Buffer Enable
0 = VMID Buffer disabled
1 = VMID Buffer enabled
VMID Soft Ramp Enable
0 = Soft ramp disabled
1 = Soft ramp enabled
Master Bias Enable
0 = Master bias disabled
1 = Master bias enabled
Also powers down ADCVMID
VMID Resistor String Value Selection
(DACVMID only)
00 = off (no VMID)
01 = 150kΩ
10 = 750kΩ
11 = 15kΩ
The selection is the total resistance of the
string from DACREFP to DACREFN. The
ADCVMID resistance is fixed at 200kΩ.
Device Global Enable
0 = ADC, DAC and PGA ramp control
circuitry disabled
1 = ADC, DAC and PGA ramp control
circuitry enabled
DESCRIPTION
DESCRIPTION
PD Rev 4.1 July 2008
WM8594
47