wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 29

• Manufacturer Part Number: wm8594seft-v
• Description: 24-bit 192khz 2vrms Multi-channel Codec
• Manufacturer: Wolfson Microelectronics plc

Production Data
DIGITAL AUDIO DATA SAMPLING RATES
Table 14 ADC Master Clock Frequency Versus Sampling Rate
Table 15 DAC Master Clock Frequency Versus Sampling Rate
w
Sampling Rate
Sampling Rate
(DACLRCLK1
DACLRCLK2)
(ADCLRCLK)
176.4kHz
44.1kHz
88.2kHz
44.1kHz
88.2kHz
192kHz
32kHz
48kHz
96kHz
32kHz
48kHz
96kHz
Unavailable
Unavailable
Unavailable
11.2896
22.5792
11.2896
22.5792
12.288
24.576
12.288
24.576
256fs
8.192
128fs
In a typical digital audio system there is one central clock source producing a reference clock to
which all audio data processing is synchronised. This clock is often referred to as the audio system’s
master clock. The WM8594 uses independent master clocks for ADC and DACs. The external
master clocks can be applied directly to the ADCMCLK, DACMCLK1 and DACMCLK2 input pins. In
a system where there are a number of possible sources for the reference clock, it is recommended
that the clock source with the lowest jitter be used for the master clock to optimise the performance
of the WM8594.
In slave clocking mode the WM8594 has a master detection circuit that automatically determines the
relationship between the master clock frequency (ADCMCLK, DACMCLK1, DACMCLK2) and the
sampling rate (ADCLRCLK, DACLRCLK1, DACLRCLK2), to within +/- 32 system clock periods. The
master clocks must be synchronised with the left/right clocks, although the device is tolerant of
phase variations or jitter on the master clocks.
The ADC supports master clock to sampling clock ratios of 256fs to 768fs and sampling rates of
32kHz to 96kHz, provided the internal signal processing of the ADC is programmed to operate at the
correct rate. The DACs support master clock to sampling clock ratios of 128fs to 1152fs and
sampling rates of 32kHz to 192kHz, provided the internal signal processing of the DACs is
programmed to operate at the correct rate.
Table 14 shows typical master clock frequencies and sampling rates supported by the WM8594
ADC.
WM8594 DACs.
MASTER CLOCK FREQUENCY (MHZ)
Unavailable
Unavailable
Table 15 shows typical master clock frequencies and sampling rates supported by the
16.9344
33.8688
16.9344
33.8688
12.288
18.432
8.4672
18.432
36.864
384fs
192fs
9.216
Unavailable
Unavailable
Unavailable
Unavailable
22.5792
MASTER CLOCK FREQUENCY (MHZ)
11.2896
22.5792
16.384
24.576
12.288
24.576
512fs
256fs
8.192
Unavailable
Unavailable
Unavailable
Unavailable
33.8688
16.9344
33.8688
24.576
36.864
12.288
18.432
36.864
768fs
384fs
Unavailable
Unavailable
Unavailable
Unavailable
22.5792
16.384
24.576
512fs
Unavailable
Unavailable
Unavailable
Unavailable
33.8688
36.864
24.576
768fs
PD Rev 4.1 July 2008
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
Unavailable
WM8594
1152fs
36.864
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