wm8753lgefl-v Wolfson Microelectronics plc, wm8753lgefl-v Datasheet - Page 55

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wm8753lgefl-v

Manufacturer Part Number
wm8753lgefl-v
Description
Hi-fi And Telephony Dual Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8753L
w
Figure 19 Right Justified Audio Interface (assuming n-bit word length)
In I
other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency
and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of
the next.
Figure 20 I
DSP MODE
In DSP/PCM mode, the left channel MSB is available on either the 1
edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately
follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be
unused BCLK cycles between the LSB of the right channel data and the next sample.
In device master mode, the LRC output will resemble the frame pulse shown in Figure 21 and Figure
22. In device slave mode, Figure 23 and Figure 24, it is possible to use any length of frame pulse less
than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period before
the rising edge of the next frame pulse.
Figure 21 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master)
DACDAT /
ADCDAT /
DACDAT /
ADCDAT /
BCLK /
VXCLK
VXDOUT
VXDOUT
BCLK /
VXCLK
2
VXDIN /
VXDIN /
LRC /
VXFS
LRC /
VXFS
S mode, the MSB is available on the second rising edge of BCLK following a LRC transition. The
2
S Justified Audio Interface (assuming n-bit word length)
MSB
1 BCLK
1
2
MSB
1
3
LEFT CHANNEL
LEFT CHANNEL
2
3
n-2 n-1
n-2 n-1
n
LSB
LSB
n
1/fs
1/fs
MSB
1 BCLK
1
2
MSB
1
3
st
RIGHT CHANNEL
RIGHT CHANNEL
2
(mode B) or 2
PD, Rev 4.0, September 2008
3
n-2 n-1
nd
n-2 n-1
Production Data
n
LSB
(mode A) rising
LSB
n
55

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