73m2921 ETC-unknow, 73m2921 Datasheet - Page 14

• Manufacturer Part Number: 73m2921
• Description: Advanced Single Chip Modem
• Manufacturer: ETC-unknow

73M2921
Advanced Single
Chip Modem
REGISTER NAME:
CR2 controls analog port enable, analog loopback, ADC receive gain, VREF voltage, charge pump, and wide
transmit bandwidth. It also has bits that are reserved for test modes.
BIT NO.
D0 – D7
D8
D9
D10
D11
D12
D13
D14
D15
(3) GENERAL REGISTER ACCESS (GRA)
For General Register Access (GRA), the mailbox the Control byte from the host controller is broken down into
bit segments as follows:
Res = Reserved
WT/
R/
Register Address Bits = 5 bit address for the register being accessed. See General Register descriptions in the
following section.
(Register address 00000b is reserved CR0 location)
Reading and writing to the General Registers via the Mailbox is a four step process for the C.
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TX BW
WIDE
D15
BIT 7
= Read / Write. 1 = Read, 0 = Write
Res
0
= Word Transfer/Byte Transfer. Should be 0 (byte transfer) for GRA.
D14
N/A
Wide Transmit
Bandwidth
Enable
Analog
NAME
Test 4
Test 5
VREF
VREF
D13
TDK
N/A
N/A
N/A
WT/
BIT 6
0
General Register Access Control Byte: Microcontroller to 73M2921
CR2 Configuration Register 2
D12
N/A
CONDITION
BIT 5
R/
Set to 0
1/0
D11
TDK
0
0
0
1
0
0
1
1
0
ANALOG
D10
EN
BIT 4
TDK Semiconductor
DESCRIPTION
Not Used.
Must be zero.
Must be zero.
Analog port turned on. The timer must also be enabled (CR1:D15).
NOTE: When the analog port is enabled and the timer is disabled, the
ADC output is looped to the DAC input.
Analog port turned off. All analog currents are off, including the
bandgap generator. The setting of the ENOSC register bit to the
disabled state also forces all analog power to be turned off.
TDK proprietary.
Not used.
Selects the voltage reference voltage
1.25V DSP detectors require this setting on this version.
Not used.
Sets the transmit filter to pass 10KHz
Sets the transmit filter to pass 3KHz (default)
TEST
D9
5
---------- Register Address Bits --------------
TEST
BIT 3
D8
4
D7
0
ADDRESS: 06H (110b)
D6
0
BIT 2
D5
0
D4
0
BIT 1
D3
0
February 99 Rev M
D2
0
D1
BIT 0
0
D0
0