xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 9

• Manufacturer Part Number: xr20m1280
• Description: I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
• Manufacturer: Exar Corporation

REV. P1.1.1
The SPI interface consists of four lines: serial clock (SCL), chip select (CS#), slave output (SO) and slave input
(SI). The serial clock, slave output and slave input can be as fast as 5 Mbps. To access the device in the SPI
mode, the CS# signal for the XR20M1280 is asserted by the SPI master, then the SPI master starts toggling
the SCL signal with the appropriate transaction information. The first bit sent by the SPI master includes
whether it is a read or write transaction and the UART register being accessed. See
F
F
1.1.3
IGURE
IGURE
6. SPI W
7. SPI R
SPI Bus Interface
EAD
RITE
SC L
S C L
SI
S I
R /W ‘0’
R /W
SO
B
5:3
2:1
7
6
0
‘0 ’
IT
A2
A 2
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
Read/Write#
Logic 1 = Read
Logic 0 = Write
Reserved
UART Internal Register Address A3:A0
UART Channel Select
’00’ = UART Channel, other values are reserved
Reserved
A1
A 1
A0
A 0
T
ABLE
‘0’
‘0 ’
‘0’
‘0 ’
3: SPI F
X
X
PRELIMINARY
D 7
D 7
IRST
9
D 6
D 6
F
UNCTION
B
D 5
D 5
YTE
D 4
D 4
F
D 3
D 3
ORMAT
D 2
D 2
D 1
D 1
D 0
D 0
Table 3
below.
XR20M1280