xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 49

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xr20m1280

Manufacturer Part Number
xr20m1280
Description
I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
Manufacturer
Exar Corporation
Datasheet

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REV. P1.1.1
(Both TX and RX)
I/O SIGNALS
REGISTERS
DLM, DLL
GPIOSEL
GPIOLVL
GPIOINT
GPIOINV
GPIO3T
XOFF1
XOFF2
EMSR
XON1
XON2
FCTR
DTR#
RTS#
IRQ#
RHR
MCR
MSR
THR
FCR
SHR
SPR
TRG
DLD
LCR
LSR
SFR
EFR
IER
ISR
FC
TX
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
DLM = 0x00 and DLL = 0x01. Only resets to these values during a power up.
They do not reset when the Reset Pin is asserted.
Bits 7-0 = 0x00
Bits 7-0 = 0xXX
Bits 7-0 = 0xXX
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x01
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x60
Bits 7-0 = 0x00
Bits 7-0 =0xX0 (Bits 7-4 = complement of modem inputs)
Bits 7-0 = 0x00
Bits 7-0 = 0xFF
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x01
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0x00
Bits 7-0 = 0xFF
HIGH
HIGH
HIGH
HIGH
T
ABLE
21: UART RESET CONDITIONS
PRELIMINARY
49
RESET STATE
RESET STATE
XR20M1280

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