xr20m1280 Exar Corporation, xr20m1280 Datasheet - Page 4

• Manufacturer Part Number: xr20m1280
• Description: I2c/spi Uart With 128-byte Fifo And Integrated Level Shifters
• Manufacturer: Exar Corporation

XR20M1280
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
PIN DESCRIPTIONS
Pin Description
GPIO0/DTR#
GPIO1/DSR#
I2C (SPI) INTERFACE
MODEM I/O and GPIOs
I2C/SPI#
RESET#
N
(CS#)
RTS#
CTS#
IRQ#
(NC)
(NC)
SDA
SCL
(SI)
SO
RX
TX
A0
A1
AME
QFN-24
P
24
13
14
15
12
20
19
IN
2
3
4
6
5
1
7
#
QFN-32
PIN#
28
29
27
26
25
24
1
4
5
6
8
7
3
9
QFN-40
PIN#
10
36
37
35
34
33
32
1
4
5
6
8
7
3
T
OD
I/O
I/O
I/O
YPE
O
O
O
I
I
I
I
I
I
I
PRELIMINARY
I
pin is HIGH. SPI interface is selected if this pin is LOW
I
selected, then this pin should be left unconnected.
I
When the I
When the SPI interface is selected, the serial clock idles LOW.
Interrupt output (open-drain, active LOW).
I
figuration is selected, this pin along with the A1 pin allows user to
change the device’s base address. If SPI configuration is selected,
this pin is the SPI chip select pin (Schmitt-trigger, active LOW).
I
configuration is selected, this pin along with A0 pin allows user to
change the device’s base address. If SPI configuration is selected,
this pin is the SPI data input pin.
SPI data output pin. If I2C-bus configuration is selected, this pin
must be left unconnected.
Reset (active LOW) - A longer than 40 ns LOW pulse on this pin will
reset the internal registers and all outputs. The UART transmitter
output will be idle and the receiver input will be ignored.
UART Transmit Data or infrared encoder data. Standard transmit
and receive interface is enabled when MCR[6] = 0. In this mode, the
TX signal will be a logic 1 during reset or idle (no data). Infrared
IrDA transmit and receive interface is enabled when MCR[6] = 1. In
the Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is a logic 0. If it is not used, leave it
unconnected.
UART Receive Data or infrared receive data. Normal receive data
input must idle at logic 1 condition. The infrared receiver idles at
logic 0. This input should be connected to VCC when not used.
UART Request-to-Send (active low) or general purpose output. This
output must be asserted prior to using auto RTS flow control, see
EFR[6], MCR[1] and IER[6].
UART Clear-to-Send (active low) or general purpose input. It can
be used for auto CTS flow control, see EFR[7], MSR[4] and IER[7].
This input should be connected to VCC when not used.
General purpose I/O or UART Data-Terminal-Ready (active low).
General purpose I/O or UART Data-Set-Ready (active low).
2
2
2
2
2
C-bus or SPI interface select. I
C-bus data input/output (open-drain). If SPI configuration is
C-bus or SPI serial input clock.
C-bus device address select A0 or SPI chip select. If I
C-bus device address select A1 or SPI data input pin. If I
4
2
C-bus interface is selected, the serial clock idles HIGH.
D
ESCRIPTION
2
C-bus interface is selected if this
2
REV. P1.1.1
C-bus con-
2
C-bus