sc16is741ipw NXP Semiconductors, sc16is741ipw Datasheet - Page 23
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sc16is741ipw
Manufacturer Part Number
sc16is741ipw
Description
Single Uart With I2c-bus/spi Interface, 64 Bytes Of Transmit And Receive Fifos, Irda Sir Built-in Support
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS741IPW.pdf
(52 pages)
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NXP Semiconductors
SC16IS741_1
Product data sheet
8.6 Modem Control Register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem.
Table 17.
[1]
Bit
7
6
5
4
3
2
1
0
MCR[7:5] and MCR[2] can only be modified when EFR[4] is set, that is, EFR[4] is a write enable.
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Symbol
Modem Control Register bits description
[1]
[1]
[1]
Description
clock divisor
IrDA mode enable
Xon Any
enable loopback
reserved
TCR and TLR enable
RTS
reserved
Single UART with I
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
logic 0 = normal UART mode
logic 1 = IrDA mode
logic 0 = disable Xon Any function
logic 1 = enable Xon Any function
logic 0 = normal operating mode
logic 1 = enable local Loopback mode (internal). In this mode the MCR[1:0]
signals are looped back into MSR[4:5] and the TX output is looped back to
the RX input internally.
logic 0 = disable the TCR and TLR register.
logic 1 = enable the TCR and TLR register.
logic 0 = force RTS output to inactive (HIGH)
logic 1 = force RTS output to active (LOW). In Loopback mode, controls
MSR[4]. If Auto RTS is enabled, the RTS output is controlled by hardware
flow control.
Table 17
Rev. 01 — 29 April 2010
shows the Modem Control Register bit settings.
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
SC16IS741
© NXP B.V. 2010. All rights reserved.
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