sc16is741ipw NXP Semiconductors, sc16is741ipw Datasheet - Page 14

• Manufacturer Part Number: sc16is741ipw
• Description: Single Uart With I2c-bus/spi Interface, 64 Bytes Of Transmit And Receive Fifos, Irda Sir Built-in Support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
SC16IS741_1
Product data sheet
DLL and DLH must be written to in order to program the baud rate. DLL and DLH are the
least significant and most significant byte of the baud rate divisor. If DLL and DLH are both
zero, the UART is effectively disabled, as no baud clock will be generated.
Remark: The programmable baud rate generator is provided to select both the transmit
and receive clock rates.
Table 7
1.8432 MHz and 3.072 MHz, respectively.
Figure 11
Table 7.
Desired baud rate
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
56000
Fig 10. Prescaler and baud rate generator block diagram
XTAL1
XTAL2
and
shows the crystal clock circuit reference.
Baud rates using a 1.8432 MHz crystal
Table 8
OSCILLATOR
INTERNAL
LOGIC
show the baud rate and divisor correlation for crystal with frequency
Single UART with I
Rev. 01 — 29 April 2010
Divisor used to generate
16× clock
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
input clock
(DIVIDE-BY-1)
(DIVIDE-BY-4)
PRESCALER
PRESCALER
LOGIC
LOGIC
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
MCR[7] = 0
MCR[7] = 1
reference
clock
Percent error difference
between desired and actual
0
0
0.026
0.058
0
0
0
0
0
0.69
0
0
0
0
0
0
0
2.86
GENERATOR
BAUD RATE
LOGIC
SC16IS741
© NXP B.V. 2010. All rights reserved.
002aaa233
internal
baud rate
clock for
transmitter
and receiver
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