sc16is762ipw NXP Semiconductors, sc16is762ipw Datasheet - Page 15
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sc16is762ipw
Manufacturer Part Number
sc16is762ipw
Description
Dual Uart With I2c-bus/spi Interface, 64 Bytes Of Transmit And Receive Fifos, Irda Sir Built-in Support
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS762IPW.pdf
(59 pages)
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NXP Semiconductors
SC16IS752_SC16IS762_6
Product data sheet
7.5.1 Interrupt mode operation
7.5.2 Polled mode operation
In Interrupt mode (if any bit of IER[3:0] is 1) the host is informed of the status of the
receiver and transmitter by an interrupt signal, IRQ. Therefore, it is not necessary to
continuously poll the Line Status Register (LSR) to see if any interrupt needs to be
serviced.
In Polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the Line Status Register (LSR). This mode is an alternative to the FIFO
Interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU.
mode operation.
Fig 8. Interrupt mode operation
Fig 9. FIFO Polled mode operation
Figure 8
HOST
HOST
shows Interrupt mode operation.
Rev. 06 — 19 December 2006
Dual UART with I
read LSR
read IIR
IRQ
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
THR
THR
LSR
IER
IER
IIR
Figure 9
1
0
1
0
RHR
RHR
1
002aab042
0
002aab043
shows FIFO Polled
1
0
© NXP B.V. 2006. All rights reserved.
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