sc16c754bibm NXP Semiconductors, sc16c754bibm Datasheet - Page 23

• Manufacturer Part Number: sc16c754bibm
• Description: 5 V, 3.3 V And 2.5 V Quad Uart, 5 Mbit/s Max. With 64-byte Fifos
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14668
Product data sheet
7.1 Receiver Holding Register (RHR)
7.2 Transmit Holding Register (THR)
Remark: Refer to the notes under
The receiver section consists of the Receiver Holding Register (RHR) and the Receiver
Shift Register (RSR). The RHR is actually a 64-byte FIFO. The RSR receives serial data
from the RX terminal. The data is converted to parallel data and moved to the RHR. The
receiver section is controlled by the Line Control Register (LCR). If the FIFO is disabled,
location zero of the FIFO is used to store the characters.
Remark: In this case, characters are overwritten if overflow occurs.
If overflow occurs, characters are lost. The RHR also stores the error status bits
associated with each character.
The transmitter section consists of the Transmit Holding Register (THR) and the Transmit
Shift Register (TSR). The THR is actually a 64-byte FIFO. The THR receives data and
shifts it into the TSR, where it is converted to serial data and moved out on the TX
terminal. If the FIFO is disabled, the FIFO is still used to store the byte. Characters are
lost if overflow occurs.
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
Rev. 02 — 13 June 2005
Table 9
for more register access information.
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC16C754B
23 of 50