sc16c754bibm NXP Semiconductors, sc16c754bibm Datasheet - Page 16

• Manufacturer Part Number: sc16c754bibm
• Description: 5 V, 3.3 V And 2.5 V Quad Uart, 5 Mbit/s Max. With 64-byte Fifos
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14668
Product data sheet
6.5.1 Interrupt mode operation
6.5.2 Polled mode operation
In interrupt mode (if any bit of IER[3:0] is ‘1’) the processor is informed of the status of the
receiver and transmitter by an interrupt signal, INT. Therefore, it is not necessary to
continuously poll the line status register (LSR) to see if any interrupt needs to be serviced.
Figure 9
In polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the line status register (LSR). This mode is an alternative to the FIFO
interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU.
mode operation.
Fig 9. Interrupt mode operation
Fig 10. FIFO polled mode operation
shows interrupt mode operation.
PROCESSOR
PROCESSOR
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
Rev. 02 — 13 June 2005
IOW / IOR
IOW / IOR
INT
THR
THR
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
IIR
Figure 10
LSR
IER
IER
1
0
SC16C754B
1
0
RHR
RHR
002aaa230
002aaa231
1
0
shows FIFO polled
1
0
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