sc16c750-04 NXP Semiconductors, sc16c750-04 Datasheet - Page 24

• Manufacturer Part Number: sc16c750-04
• Description: Sc16c750 Universal Asynchronous Receiver/transmitter Uart With 64-byte Fifo
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 11623
Product data
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 18:
Bit
7
6
5
4
3
2
1
0
Symbol
MCR[7]
MCR[6]
MCR[5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
Rev. 04 — 20 June 2003
Description
Reserved. Set to 0.
Reserved. Set to 0.
Reserved. Set to 0.
Loop-back. Enable the local loop-back mode (diagnostics). In this
mode the transmitter output (TX) and the receiver input (RX), CTS,
DSR, DCD, and RI are disconnected from the
Internally the modem data and control pins are connected into a
loop-back data configuration (see
and transmitter interrupts remain fully operational. The Modem
Control Interrupts are also operational, but the interrupts’ sources are
switched to the lower four bits of the Modem Control. Interrupts
continue to be controlled by the IER register.
OUT2, INTx enable. Used to control the modem DCD signal in the
loop-back mode.
OUT1. This bit is used in the Loop-back mode only. In the loop-back
mode, this bit is used to write the state of the modem RI interface
signal via OUT1.
RTS
DTR
Logic 0 = Disable loop-back mode (normal default condition).
Logic 1 = Enable local loop-back mode (diagnostics).
Logic 0 = Forces INT output to the 3-State mode. In the loop-back
mode, sets OUT2 (DCD) internally to a logic 1.
Logic 1 = Forces the INT output to the active mode. In the
loop-back mode, sets OUT2 (DCD) internally to a logic 0.
Logic 0 = Force RTS output to a logic 1 (normal default condition).
Logic 1 = Force RTS output to a logic 0.
Logic 0 = Force DTR output to a logic 1 (normal default condition).
Logic 1 = Force DTR output to a logic 0.
Figure
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5). In this mode, the receiver
UART with 64-byte FIFO
SC16C750
SC16C750
I/O pins.
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